drivers/net/ethernet/marvell/octeontx2/af/mcs.c

File Facts

System

Linux kernel

Corpus path

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

Extension

.c

Size

43015 bytes

Lines

1618

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: operation-table or driver-model contract

Status

pattern implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Allocates kernel memory; connect allocation flags and lifetime to context constraints.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/bitfield.h
• linux/delay.h
• linux/device.h
• linux/module.h
• linux/pci.h
• mcs.h
• mcs_reg.h

Detected Declarations

• function mcs_get_tx_secy_stats
• function mcs_get_rx_secy_stats
• function mcs_get_flowid_stats
• function mcs_get_port_stats
• function mcs_get_sa_stats
• function mcs_get_sc_stats
• function mcs_clear_stats
• function mcs_clear_all_stats
• function mcs_pn_table_write
• function cn10kb_mcs_tx_sa_mem_map_write
• function cn10kb_mcs_rx_sa_mem_map_write
• function mcs_sa_plcy_write
• function mcs_ena_dis_sc_cam_entry
• function mcs_rx_sc_cam_write
• function mcs_secy_plcy_write
• function cn10kb_mcs_flowid_secy_map
• function mcs_ena_dis_flowid_entry
• function mcs_flowid_entry_write
• function mcs_install_flowid_bypass_entry
• function mcs_clear_secy_plcy
• function mcs_alloc_ctrlpktrule
• function mcs_free_ctrlpktrule
• function mcs_ctrlpktrule_write
• function mcs_free_rsrc
• function mcs_free_all_rsrc
• function mcs_alloc_rsrc
• function mcs_alloc_all_rsrc
• function cn10kb_mcs_tx_pn_wrapped_handler
• function for_each_set_bit
• function cn10kb_mcs_tx_pn_thresh_reached_handler
• function mcs_rx_pn_thresh_reached_handler
• function mcs_rx_misc_intr_handler
• function mcs_tx_misc_intr_handler
• function cn10kb_mcs_bbe_intr_handler
• function cn10kb_mcs_pab_intr_handler
• function mcs_ip_intr_handler
• function mcs_alloc_struct_mem
• function mcs_register_interrupts
• function mcs_get_blkcnt
• function list_for_each_entry
• function is_mcs_bypass
• function list_for_each_entry
• function mcs_set_port_cfg
• function mcs_get_port_cfg
• function mcs_get_custom_tag_cfg
• function mcs_reset_port
• function mcs_set_lmac_mode
• function mcs_pn_threshold_set

Annotated Snippet

struct pci_driver mcs_driver = {
	.name = DRV_NAME,
	.id_table = mcs_id_table,
	.probe = mcs_probe,
	.remove = mcs_remove,
};

Annotation

• Immediate include surface: `linux/bitfield.h`, `linux/delay.h`, `linux/device.h`, `linux/module.h`, `linux/pci.h`, `mcs.h`, `mcs_reg.h`.
• Detected declarations: `function mcs_get_tx_secy_stats`, `function mcs_get_rx_secy_stats`, `function mcs_get_flowid_stats`, `function mcs_get_port_stats`, `function mcs_get_sa_stats`, `function mcs_get_sc_stats`, `function mcs_clear_stats`, `function mcs_clear_all_stats`, `function mcs_pn_table_write`, `function cn10kb_mcs_tx_sa_mem_map_write`.
• Atlas domain: Driver Families / drivers/net.
• Implementation status: pattern implementation candidate.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.