drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
Extension
.c
Size
21619 bytes
Lines
933
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/* Marvell CN10K MCS driver
 *
 * Copyright (C) 2022 Marvell.
 */

#include <linux/types.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/pci.h>

#include "mcs.h"
#include "rvu.h"
#include "mcs_reg.h"
#include "lmac_common.h"

#define M(_name, _id, _fn_name, _req_type, _rsp_type)			\
static struct _req_type __maybe_unused					\
*otx2_mbox_alloc_msg_ ## _fn_name(struct rvu *rvu, int devid)		\
{									\
	struct _req_type *req;						\
									\
	req = (struct _req_type *)otx2_mbox_alloc_msg_rsp(		\
		&rvu->afpf_wq_info.mbox_up, devid, sizeof(struct _req_type), \
		sizeof(struct _rsp_type));				\
	if (!req)							\
		return NULL;						\
	req->hdr.sig = OTX2_MBOX_REQ_SIG;				\
	req->hdr.id = _id;						\
	return req;							\
}

MBOX_UP_MCS_MESSAGES
#undef M

void rvu_mcs_ptp_cfg(struct rvu *rvu, u8 rpm_id, u8 lmac_id, bool ena)
{
	struct mcs *mcs;
	u64 cfg;
	u8 port;

	if (!rvu->mcs_blk_cnt)
		return;

	/* When ptp is enabled, RPM appends 8B header for all
	 * RX packets. MCS PEX need to configure to skip 8B
	 * during packet parsing.
	 */

	/* CNF10K-B */
	if (rvu->mcs_blk_cnt > 1) {
		mcs = mcs_get_pdata(rpm_id);
		cfg = mcs_reg_read(mcs, MCSX_PEX_RX_SLAVE_PEX_CONFIGURATION);
		if (ena)
			cfg |= BIT_ULL(lmac_id);
		else
			cfg &= ~BIT_ULL(lmac_id);
		mcs_reg_write(mcs, MCSX_PEX_RX_SLAVE_PEX_CONFIGURATION, cfg);
		return;
	}
	/* CN10KB */
	mcs = mcs_get_pdata(0);
	port = (rpm_id * rvu->hw->lmac_per_cgx) + lmac_id;
	cfg = mcs_reg_read(mcs, MCSX_PEX_RX_SLAVE_PORT_CFGX(port));
	if (ena)
		cfg |= BIT_ULL(0);
	else
		cfg &= ~BIT_ULL(0);
	mcs_reg_write(mcs, MCSX_PEX_RX_SLAVE_PORT_CFGX(port), cfg);
}

int rvu_mbox_handler_mcs_set_lmac_mode(struct rvu *rvu,
				       struct mcs_set_lmac_mode *req,
				       struct msg_rsp *rsp)
{
	struct mcs *mcs;

	if (req->mcs_id >= rvu->mcs_blk_cnt)
		return MCS_AF_ERR_INVALID_MCSID;

	mcs = mcs_get_pdata(req->mcs_id);

	if (BIT_ULL(req->lmac_id) & mcs->hw->lmac_bmap)
		mcs_set_lmac_mode(mcs, req->lmac_id, req->mode);

	return 0;
}

int mcs_add_intr_wq_entry(struct mcs *mcs, struct mcs_intr_event *event)
{

Annotation

Implementation Notes