drivers/net/ethernet/marvell/octeontx2/af/npc.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/marvell/octeontx2/af/npc.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/marvell/octeontx2/af/npc.h- Extension
.h- Size
- 15588 bytes
- Lines
- 670
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct npc_kpu_profile_camstruct npc_kpu_profile_cam2struct npc_kpu_profile_actionstruct npc_kpu_profilestruct npc_kpu_camstruct npc_kpu_action0struct npc_kpu_action1struct npc_kpu_pkind_cpi_defstruct nix_rx_actionstruct nix_tx_actionstruct npc_coalesced_kpu_prflstruct npc_mcam_kexstruct npc_kpu_fwdatastruct npc_lt_defstruct npc_lt_def_ipsecstruct npc_lt_def_apadstruct npc_lt_def_colorstruct npc_lt_def_etstruct npc_lt_def_cfgstruct npc_kpu_profile_fwdatastruct rvu_npc_mcam_ruleenum NPC_LID_Eenum npc_kpu_la_ltypeenum npc_kpu_lb_ltypeenum npc_kpu_lc_ltypeenum npc_kpu_ld_ltypeenum npc_kpu_le_ltypeenum npc_kpu_lf_ltypeenum npc_kpu_lg_ltypeenum npc_kpu_lh_ltypeenum npc_pkind_typeenum npc_interface_typeenum key_fields
Annotated Snippet
struct npc_kpu_profile_cam {
u8 state;
u8 state_mask;
u16 dp0;
u16 dp0_mask;
u16 dp1;
u16 dp1_mask;
u16 dp2;
u16 dp2_mask;
} __packed;
struct npc_kpu_profile_cam2 {
u8 state;
u8 state_mask;
u16 dp0;
u16 dp0_mask;
u16 dp1;
u16 dp1_mask;
u16 dp2;
u16 dp2_mask;
u8 ptype;
u8 ptype_mask;
} __packed;
struct npc_kpu_profile_action {
u8 errlev;
u8 errcode;
u8 dp0_offset;
u8 dp1_offset;
u8 dp2_offset;
u8 bypass_count;
u8 parse_done;
u8 next_state;
u8 ptr_advance;
u8 cap_ena;
u8 lid;
u8 ltype;
u8 flags;
u8 offset;
u8 mask;
u8 right;
u8 shift;
} __packed;
struct npc_kpu_profile {
int cam_entries;
int action_entries;
struct npc_kpu_profile_cam *cam;
struct npc_kpu_profile_action *action;
int cam_entries2;
int action_entries2;
struct npc_kpu_profile_action *action2;
struct npc_kpu_profile_cam2 *cam2;
};
/* NPC KPU register formats */
struct npc_kpu_cam {
#if defined(__BIG_ENDIAN_BITFIELD)
u64 rsvd_63_56 : 8;
u64 state : 8;
u64 dp2_data : 16;
u64 dp1_data : 16;
u64 dp0_data : 16;
#else
u64 dp0_data : 16;
u64 dp1_data : 16;
u64 dp2_data : 16;
u64 state : 8;
u64 rsvd_63_56 : 8;
#endif
};
struct npc_kpu_action0 {
#if defined(__BIG_ENDIAN_BITFIELD)
u64 rsvd_63_57 : 7;
u64 byp_count : 3;
u64 capture_ena : 1;
u64 parse_done : 1;
u64 next_state : 8;
u64 rsvd_43 : 1;
u64 capture_lid : 3;
u64 capture_ltype : 4;
u64 capture_flags : 8;
u64 ptr_advance : 8;
u64 var_len_offset : 8;
u64 var_len_mask : 8;
u64 var_len_right : 1;
u64 var_len_shift : 3;
#else
u64 var_len_shift : 3;
Annotation
- Detected declarations: `struct npc_kpu_profile_cam`, `struct npc_kpu_profile_cam2`, `struct npc_kpu_profile_action`, `struct npc_kpu_profile`, `struct npc_kpu_cam`, `struct npc_kpu_action0`, `struct npc_kpu_action1`, `struct npc_kpu_pkind_cpi_def`, `struct nix_rx_action`, `struct nix_tx_action`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.