drivers/net/ethernet/marvell/prestera/prestera_dsa.h

File Facts

System

Linux kernel

Corpus path

drivers/net/ethernet/marvell/prestera/prestera_dsa.h

Extension

.h

Size

742 bytes

Lines

37

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/types.h

Detected Declarations

• struct prestera_dsa_vlan
• struct prestera_dsa
• enum prestera_dsa_cmd

Annotated Snippet

struct prestera_dsa_vlan {
	u16 vid;
	u8 vpt;
	u8 cfi_bit;
	bool is_tagged;
};

struct prestera_dsa {
	struct prestera_dsa_vlan vlan;
	u32 hw_dev_num;
	u32 port_num;
	u8 cpu_code;
};

int prestera_dsa_parse(struct prestera_dsa *dsa, const u8 *dsa_buf);
int prestera_dsa_build(const struct prestera_dsa *dsa, u8 *dsa_buf);

#endif /* _PRESTERA_DSA_H_ */

Annotation

• Immediate include surface: `linux/types.h`.
• Detected declarations: `struct prestera_dsa_vlan`, `struct prestera_dsa`, `enum prestera_dsa_cmd`.
• Atlas domain: Driver Families / drivers/net.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.