drivers/net/ethernet/mediatek/mtk_wed_regs.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mediatek/mtk_wed_regs.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/mediatek/mtk_wed_regs.h
Extension
.h
Size
32363 bytes
Lines
816
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mtk_wdma_desc {
	__le32 buf0;
	__le32 ctrl;
	__le32 buf1;
	__le32 info;
} __packed __aligned(4);

#define MTK_WED_REV_ID					0x004

#define MTK_WED_RESET					0x008
#define MTK_WED_RESET_TX_BM				BIT(0)
#define MTK_WED_RESET_RX_BM				BIT(1)
#define MTK_WED_RESET_RX_PG_BM				BIT(2)
#define MTK_WED_RESET_RRO_RX_TO_PG			BIT(3)
#define MTK_WED_RESET_TX_FREE_AGENT			BIT(4)
#define MTK_WED_RESET_WPDMA_TX_DRV			BIT(8)
#define MTK_WED_RESET_WPDMA_RX_DRV			BIT(9)
#define MTK_WED_RESET_WPDMA_RX_D_DRV			BIT(10)
#define MTK_WED_RESET_WPDMA_INT_AGENT			BIT(11)
#define MTK_WED_RESET_WED_TX_DMA			BIT(12)
#define MTK_WED_RESET_WED_RX_DMA			BIT(13)
#define MTK_WED_RESET_WDMA_TX_DRV			BIT(16)
#define MTK_WED_RESET_WDMA_RX_DRV			BIT(17)
#define MTK_WED_RESET_WDMA_INT_AGENT			BIT(19)
#define MTK_WED_RESET_RX_RRO_QM				BIT(20)
#define MTK_WED_RESET_RX_ROUTE_QM			BIT(21)
#define MTK_WED_RESET_TX_AMSDU				BIT(22)
#define MTK_WED_RESET_WED				BIT(31)

#define MTK_WED_CTRL					0x00c
#define MTK_WED_CTRL_WPDMA_INT_AGENT_EN			BIT(0)
#define MTK_WED_CTRL_WPDMA_INT_AGENT_BUSY		BIT(1)
#define MTK_WED_CTRL_WDMA_INT_AGENT_EN			BIT(2)
#define MTK_WED_CTRL_WDMA_INT_AGENT_BUSY		BIT(3)
#define MTK_WED_CTRL_WED_RX_IND_CMD_EN			BIT(5)
#define MTK_WED_CTRL_WED_RX_PG_BM_EN			BIT(6)
#define MTK_WED_CTRL_WED_RX_PG_BM_BUSY			BIT(7)
#define MTK_WED_CTRL_WED_TX_BM_EN			BIT(8)
#define MTK_WED_CTRL_WED_TX_BM_BUSY			BIT(9)
#define MTK_WED_CTRL_WED_TX_FREE_AGENT_EN		BIT(10)
#define MTK_WED_CTRL_WED_TX_FREE_AGENT_BUSY		BIT(11)
#define MTK_WED_CTRL_WED_RX_BM_EN			BIT(12)
#define MTK_WED_CTRL_WED_RX_BM_BUSY			BIT(13)
#define MTK_WED_CTRL_RX_RRO_QM_EN			BIT(14)
#define MTK_WED_CTRL_RX_RRO_QM_BUSY			BIT(15)
#define MTK_WED_CTRL_RX_ROUTE_QM_EN			BIT(16)
#define MTK_WED_CTRL_RX_ROUTE_QM_BUSY			BIT(17)
#define MTK_WED_CTRL_TX_TKID_ALI_EN			BIT(20)
#define MTK_WED_CTRL_TX_TKID_ALI_BUSY			BIT(21)
#define MTK_WED_CTRL_TX_AMSDU_EN			BIT(22)
#define MTK_WED_CTRL_TX_AMSDU_BUSY			BIT(23)
#define MTK_WED_CTRL_FINAL_DIDX_READ			BIT(24)
#define MTK_WED_CTRL_ETH_DMAD_FMT			BIT(25)
#define MTK_WED_CTRL_MIB_READ_CLEAR			BIT(28)
#define MTK_WED_CTRL_FLD_MIB_RD_CLR			BIT(28)

#define MTK_WED_EXT_INT_STATUS				0x020
#define MTK_WED_EXT_INT_STATUS_TF_LEN_ERR		BIT(0)
#define MTK_WED_EXT_INT_STATUS_TKID_WO_PYLD		BIT(1)
#define MTK_WED_EXT_INT_STATUS_TKID_TITO_INVALID	BIT(4)
#define MTK_WED_EXT_INT_STATUS_TX_FBUF_LO_TH		BIT(8)
#define MTK_WED_EXT_INT_STATUS_TX_FBUF_HI_TH		BIT(9)
#define MTK_WED_EXT_INT_STATUS_RX_FBUF_LO_TH		BIT(10) /* wed v2 */
#define MTK_WED_EXT_INT_STATUS_RX_FBUF_HI_TH		BIT(11) /* wed v2 */
#define MTK_WED_EXT_INT_STATUS_RX_DRV_R_RESP_ERR	BIT(16)
#define MTK_WED_EXT_INT_STATUS_RX_DRV_W_RESP_ERR	BIT(17)
#define MTK_WED_EXT_INT_STATUS_RX_DRV_COHERENT		BIT(18)
#define MTK_WED_EXT_INT_STATUS_RX_DRV_INIT_WDMA_EN	BIT(19)
#define MTK_WED_EXT_INT_STATUS_RX_DRV_BM_DMAD_COHERENT	BIT(20)
#define MTK_WED_EXT_INT_STATUS_TX_DRV_R_RESP_ERR	BIT(21)
#define MTK_WED_EXT_INT_STATUS_TX_DMA_R_RESP_ERR	BIT(22)
#define MTK_WED_EXT_INT_STATUS_TX_DMA_W_RESP_ERR	BIT(23)
#define MTK_WED_EXT_INT_STATUS_RX_DRV_DMA_RECYCLE	BIT(24)
#define MTK_WED_EXT_INT_STATUS_RX_DRV_GET_BM_DMAD_SKIP	BIT(25)
#define MTK_WED_EXT_INT_STATUS_WPDMA_RX_D_DRV_ERR	BIT(26)
#define MTK_WED_EXT_INT_STATUS_WPDMA_MID_RDY		BIT(27)
#define MTK_WED_EXT_INT_STATUS_ERROR_MASK		(MTK_WED_EXT_INT_STATUS_TF_LEN_ERR | \
							 MTK_WED_EXT_INT_STATUS_TKID_WO_PYLD | \
							 MTK_WED_EXT_INT_STATUS_TKID_TITO_INVALID | \
							 MTK_WED_EXT_INT_STATUS_RX_DRV_R_RESP_ERR | \
							 MTK_WED_EXT_INT_STATUS_RX_DRV_W_RESP_ERR | \
							 MTK_WED_EXT_INT_STATUS_RX_DRV_INIT_WDMA_EN | \
							 MTK_WED_EXT_INT_STATUS_TX_DMA_R_RESP_ERR)

#define MTK_WED_EXT_INT_MASK				0x028
#define MTK_WED_EXT_INT_MASK1				0x02c
#define MTK_WED_EXT_INT_MASK2				0x030
#define MTK_WED_EXT_INT_MASK3				0x034

#define MTK_WED_STATUS					0x060

Annotation

Implementation Notes