drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c- Extension
.c- Size
- 47390 bytes
- Lines
- 1798
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/mlx5/device.hlinux/mlx5/mlx5_ifc.hlinux/xarray.hlinux/if_vlan.hlinux/iopoll.hen.hlib/aso.hlib/crypto.hen_accel/macsec.h
Detected Declarations
struct mlx5e_macsec_handlestruct mlx5e_macsec_aso_outstruct mlx5e_macsec_aso_instruct mlx5e_macsec_epn_statestruct mlx5e_macsec_async_workstruct mlx5e_macsec_sastruct mlx5e_macsec_rx_scstruct mlx5e_macsec_rx_sc_xarray_elementstruct mlx5e_macsec_rx_scstruct mlx5e_macsec_umrstruct mlx5e_macsec_asostruct mlx5e_macsec_devicestruct mlx5e_macsecstruct mlx5_macsec_obj_attrsstruct mlx5_aso_ctrl_paramenum mlx5_macsec_aso_event_armfunction mlx5e_macsec_aso_reg_mrfunction mlx5e_macsec_aso_dereg_mrfunction macsec_set_replay_protectionfunction mlx5e_macsec_create_objectfunction mlx5e_macsec_destroy_objectfunction mlx5e_macsec_cleanup_sa_fsfunction mlx5e_macsec_cleanup_safunction mlx5e_macsec_init_sa_fsfunction mlx5e_macsec_init_safunction mlx5e_macsec_get_rx_sc_from_sc_listfunction list_for_each_entry_rcufunction macsec_rx_sa_active_updatefunction mlx5e_macsec_secy_features_validatefunction mlx5e_macsec_get_macsec_device_contextfunction update_macsec_epnfunction mlx5e_macsec_add_txsafunction mlx5e_macsec_upd_txsafunction mlx5e_macsec_del_txsafunction mlx5e_macsec_add_rxscfunction mlx5e_macsec_upd_rxscfunction macsec_del_rxsc_ctxfunction mlx5e_macsec_del_rxscfunction mlx5e_macsec_add_rxsafunction mlx5e_macsec_upd_rxsafunction mlx5e_macsec_del_rxsafunction mlx5e_macsec_add_secyfunction macsec_upd_secy_hw_addressfunction list_for_each_entry_safefunction contextsfunction mlx5e_macsec_del_secyfunction macsec_build_accel_attrsfunction macsec_aso_build_wqe_ctrl_seg
Annotated Snippet
struct mlx5e_macsec_handle {
struct mlx5e_macsec *macsec;
u32 obj_id;
u8 idx;
};
enum {
MLX5_MACSEC_EPN,
};
struct mlx5e_macsec_aso_out {
u8 event_arm;
u32 mode_param;
};
struct mlx5e_macsec_aso_in {
u8 mode;
u32 obj_id;
};
struct mlx5e_macsec_epn_state {
u32 epn_msb;
u8 epn_enabled;
u8 overlap;
};
struct mlx5e_macsec_async_work {
struct mlx5e_macsec *macsec;
struct mlx5_core_dev *mdev;
struct work_struct work;
u32 obj_id;
};
struct mlx5e_macsec_sa {
bool active;
u8 assoc_num;
u32 macsec_obj_id;
u32 enc_key_id;
u32 next_pn;
sci_t sci;
ssci_t ssci;
salt_t salt;
union mlx5_macsec_rule *macsec_rule;
struct rcu_head rcu_head;
struct mlx5e_macsec_epn_state epn_state;
};
struct mlx5e_macsec_rx_sc;
struct mlx5e_macsec_rx_sc_xarray_element {
u32 fs_id;
struct mlx5e_macsec_rx_sc *rx_sc;
};
struct mlx5e_macsec_rx_sc {
bool active;
sci_t sci;
struct mlx5e_macsec_sa *rx_sa[MACSEC_NUM_AN];
struct list_head rx_sc_list_element;
struct mlx5e_macsec_rx_sc_xarray_element *sc_xarray_element;
struct metadata_dst *md_dst;
struct rcu_head rcu_head;
};
struct mlx5e_macsec_umr {
u8 __aligned(64) ctx[MLX5_ST_SZ_BYTES(macsec_aso)];
dma_addr_t dma_addr;
u32 mkey;
};
struct mlx5e_macsec_aso {
/* ASO */
struct mlx5_aso *maso;
/* Protects macsec ASO */
struct mutex aso_lock;
/* UMR */
struct mlx5e_macsec_umr *umr;
u32 pdn;
};
struct mlx5e_macsec_device {
const struct net_device *netdev;
struct mlx5e_macsec_sa *tx_sa[MACSEC_NUM_AN];
struct list_head macsec_rx_sc_list_head;
unsigned char *dev_addr;
struct list_head macsec_device_list_element;
};
struct mlx5e_macsec {
Annotation
- Immediate include surface: `linux/mlx5/device.h`, `linux/mlx5/mlx5_ifc.h`, `linux/xarray.h`, `linux/if_vlan.h`, `linux/iopoll.h`, `en.h`, `lib/aso.h`, `lib/crypto.h`.
- Detected declarations: `struct mlx5e_macsec_handle`, `struct mlx5e_macsec_aso_out`, `struct mlx5e_macsec_aso_in`, `struct mlx5e_macsec_epn_state`, `struct mlx5e_macsec_async_work`, `struct mlx5e_macsec_sa`, `struct mlx5e_macsec_rx_sc`, `struct mlx5e_macsec_rx_sc_xarray_element`, `struct mlx5e_macsec_rx_sc`, `struct mlx5e_macsec_umr`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.