drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c- Extension
.c- Size
- 7780 bytes
- Lines
- 283
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/irq.hnet/xdp_sock_drv.hen.hen/txrx.hen/xdp.hen/xsk/rx.hen/xsk/tx.hen_accel/ktls_txrx.h
Detected Declarations
function Copyrightfunction mlx5e_handle_tx_dimfunction mlx5e_handle_rx_dimfunction mlx5e_trigger_irqfunction mlx5e_napi_xsk_postfunction mlx5e_napi_pollfunction mlx5e_completion_eventfunction mlx5e_cq_error_event
Annotated Snippet
if (xsk_open) {
busy |= mlx5e_poll_xdpsq_cq(&xsksq->cq);
busy_xsk |= mlx5e_napi_xsk_post(xsksq, xskrq);
busy |= busy_xsk;
}
}
busy |= INDIRECT_CALL_2(rq->post_wqes,
mlx5e_post_rx_mpwqes,
mlx5e_post_rx_wqes,
rq);
if (busy) {
if (likely(mlx5e_channel_no_affinity_change(c))) {
work_done = budget;
goto out;
}
ch_stats->aff_change++;
aff_change = true;
if (work_done == budget)
work_done--;
}
if (unlikely(!napi_complete_done(napi, work_done)))
goto out;
ch_stats->arm++;
for (i = 0; i < c->num_tc; i++) {
mlx5e_handle_tx_dim(&c->sq[i]);
mlx5e_cq_arm(&c->sq[i].cq);
}
if (unlikely(qos_sqs)) {
for (i = 0; i < qos_sqs_size; i++) {
struct mlx5e_txqsq *sq = rcu_dereference(qos_sqs[i]);
if (sq) {
mlx5e_handle_tx_dim(sq);
mlx5e_cq_arm(&sq->cq);
}
}
}
mlx5e_handle_rx_dim(rq);
mlx5e_cq_arm(&rq->cq);
mlx5e_cq_arm(&c->icosq.cq);
if (aicosq) {
mlx5e_cq_arm(&aicosq->cq);
if (xsk_open) {
mlx5e_handle_rx_dim(xskrq);
mlx5e_cq_arm(&xsksq->cq);
mlx5e_cq_arm(&xskrq->cq);
}
if (c->xdpsq)
mlx5e_cq_arm(&c->xdpsq->cq);
}
if (unlikely(aff_change && busy_xsk)) {
mlx5e_trigger_napi_async_icosq(c);
ch_stats->force_irq++;
}
out:
rcu_read_unlock();
return work_done;
}
void mlx5e_completion_event(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
{
struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
napi_schedule(cq->napi);
cq->event_ctr++;
cq->ch_stats->events++;
}
void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, enum mlx5_event event)
{
struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
struct net_device *netdev = cq->netdev;
netdev_err(netdev, "%s: cqn=0x%.6x event=0x%.2x\n",
__func__, mcq->cqn, event);
}
Annotation
- Immediate include surface: `linux/irq.h`, `net/xdp_sock_drv.h`, `en.h`, `en/txrx.h`, `en/xdp.h`, `en/xsk/rx.h`, `en/xsk/tx.h`, `en_accel/ktls_txrx.h`.
- Detected declarations: `function Copyright`, `function mlx5e_handle_tx_dim`, `function mlx5e_handle_rx_dim`, `function mlx5e_trigger_irq`, `function mlx5e_napi_xsk_post`, `function mlx5e_napi_poll`, `function mlx5e_completion_event`, `function mlx5e_cq_error_event`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.