drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c
Extension
.c
Size
8941 bytes
Lines
289
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (vport->adjacent) {
			func_id = vport->adj_info.function_id;
			pfnum = vport->adj_info.parent_pci_devfn;
		} else if (external) {
			pfnum = mlx5_esw_get_hpf_pf_num(dev);
		}

		devlink_port_attrs_pci_vf_set(dl_port, controller_num, pfnum,
					      func_id, external);
	}  else if (mlx5_core_is_ec_vf_vport(esw->dev, vport_num)) {
		u16 base_vport = mlx5_core_ec_vf_vport_base(dev);

		memcpy(dl_port->attrs.switch_id.id, ppid.id, ppid.id_len);
		dl_port->attrs.switch_id.id_len = ppid.id_len;
		devlink_port_attrs_pci_vf_set(dl_port, 0, pfnum,
					      vport_num - base_vport, false);
	} else if (mlx5_esw_is_spf_vport(esw, vport_num)) {
		int spf_idx = mlx5_esw_spf_vport_to_idx(esw, vport_num);

		controller_num = esw->esw_funcs.spfs[spf_idx].host_number + 1;
		pfnum = esw->esw_funcs.spfs[spf_idx].pf_num;

		memcpy(dl_port->attrs.switch_id.id, ppid.id, ppid.id_len);
		dl_port->attrs.switch_id.id_len = ppid.id_len;
		devlink_port_attrs_pci_pf_set(dl_port, controller_num, pfnum,
					      true);
	}
}

int mlx5_esw_offloads_pf_vf_devlink_port_init(struct mlx5_eswitch *esw,
					      struct mlx5_vport *vport)
{
	struct mlx5_devlink_port *dl_port;
	u16 vport_num = vport->vport;

	if (!mlx5_esw_devlink_port_supported(esw, vport_num))
		return 0;

	dl_port = kzalloc_obj(*dl_port);
	if (!dl_port)
		return -ENOMEM;

	mlx5_esw_offloads_pf_vf_devlink_port_attrs_set(esw, vport_num,
						       &dl_port->dl_port);

	vport->dl_port = dl_port;
	mlx5_devlink_port_init(dl_port, vport);
	return 0;
}

void mlx5_esw_offloads_pf_vf_devlink_port_cleanup(struct mlx5_eswitch *esw,
						  struct mlx5_vport *vport)
{
	if (!vport->dl_port)
		return;

	kfree(vport->dl_port);
	vport->dl_port = NULL;
}

static const struct devlink_port_ops mlx5_esw_pf_vf_dl_port_ops = {
	.port_fn_hw_addr_get = mlx5_devlink_port_fn_hw_addr_get,
	.port_fn_hw_addr_set = mlx5_devlink_port_fn_hw_addr_set,
	.port_fn_roce_get = mlx5_devlink_port_fn_roce_get,
	.port_fn_roce_set = mlx5_devlink_port_fn_roce_set,
	.port_fn_migratable_get = mlx5_devlink_port_fn_migratable_get,
	.port_fn_migratable_set = mlx5_devlink_port_fn_migratable_set,
	.port_fn_state_get = mlx5_devlink_pf_port_fn_state_get,
	.port_fn_state_set = mlx5_devlink_pf_port_fn_state_set,
#ifdef CONFIG_XFRM_OFFLOAD
	.port_fn_ipsec_crypto_get = mlx5_devlink_port_fn_ipsec_crypto_get,
	.port_fn_ipsec_crypto_set = mlx5_devlink_port_fn_ipsec_crypto_set,
	.port_fn_ipsec_packet_get = mlx5_devlink_port_fn_ipsec_packet_get,
	.port_fn_ipsec_packet_set = mlx5_devlink_port_fn_ipsec_packet_set,
#endif /* CONFIG_XFRM_OFFLOAD */
	.port_fn_max_io_eqs_get = mlx5_devlink_port_fn_max_io_eqs_get,
	.port_fn_max_io_eqs_set = mlx5_devlink_port_fn_max_io_eqs_set,
};

static void mlx5_esw_offloads_sf_devlink_port_attrs_set(struct mlx5_eswitch *esw,
							struct devlink_port *dl_port,
							u32 controller, u32 sfnum)
{
	struct mlx5_core_dev *dev = esw->dev;
	struct netdev_phys_item_id ppid = {};
	u16 pfnum;

	pfnum = mlx5_esw_sf_controller_to_pfnum(dev, controller);
	mlx5_esw_get_port_parent_id(dev, &ppid);
	memcpy(dl_port->attrs.switch_id.id, &ppid.id[0], ppid.id_len);

Annotation

Implementation Notes