drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c- Extension
.c- Size
- 58155 bytes
- Lines
- 2102
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
eswitch.hlib/mlx5.hesw/qos.hen/port.hdiag/qos_tracepoint.h
Detected Declarations
struct mlx5_qos_domainstruct mlx5_esw_sched_nodeenum sched_node_typefunction esw_qos_lockfunction esw_qos_unlockfunction esw_assert_qos_lock_heldfunction esw_qos_domain_initfunction esw_qos_domain_releasefunction esw_qos_node_attach_to_parentfunction esw_qos_num_tcsfunction esw_qos_node_set_parentfunction esw_qos_nodes_set_parentfunction list_for_each_entry_safefunction list_for_each_entryfunction mlx5_esw_qos_vport_qos_freefunction mlx5_esw_qos_vport_get_sched_elem_ixfunction mlx5_esw_qos_vport_get_parentfunction esw_qos_sched_elem_warnfunction esw_qos_node_create_sched_elementfunction esw_qos_node_destroy_sched_elementfunction esw_qos_sched_elem_configfunction esw_qos_create_rate_limit_elementfunction esw_qos_calculate_min_rate_dividerfunction esw_qos_calc_bw_sharefunction esw_qos_update_sched_node_bw_sharefunction esw_qos_normalize_min_ratefunction list_for_each_entryfunction esw_qos_calculate_tc_bw_dividerfunction esw_qos_set_node_min_ratefunction esw_qos_create_node_sched_elemfunction esw_qos_vport_create_sched_elementfunction esw_qos_vport_tc_create_sched_elementfunction __esw_qos_alloc_nodefunction __esw_qos_free_nodefunction esw_qos_destroy_nodefunction esw_qos_create_vports_tc_nodefunction esw_qos_tc_arbiter_get_bw_sharesfunction esw_qos_set_tc_arbiter_bw_sharesfunction esw_qos_destroy_vports_tc_nodesfunction esw_qos_create_vports_tc_nodesfunction esw_qos_create_tc_arbiter_sched_elemfunction __esw_qos_create_vports_sched_nodefunction esw_qos_create_vports_sched_nodefunction __esw_qos_destroy_nodefunction esw_qos_createfunction esw_qos_destroyfunction esw_qos_getfunction esw_qos_put
Annotated Snippet
struct mlx5_qos_domain {
/* Serializes access to all qos changes in the qos domain. */
struct mutex lock;
/* List of all mlx5_esw_sched_nodes. */
struct list_head nodes;
};
static void esw_qos_lock(struct mlx5_eswitch *esw)
{
mutex_lock(&esw->qos.domain->lock);
}
static void esw_qos_unlock(struct mlx5_eswitch *esw)
{
mutex_unlock(&esw->qos.domain->lock);
}
static void esw_assert_qos_lock_held(struct mlx5_eswitch *esw)
{
lockdep_assert_held(&esw->qos.domain->lock);
}
static struct mlx5_qos_domain *esw_qos_domain_alloc(void)
{
struct mlx5_qos_domain *qos_domain;
qos_domain = kzalloc_obj(*qos_domain);
if (!qos_domain)
return NULL;
mutex_init(&qos_domain->lock);
INIT_LIST_HEAD(&qos_domain->nodes);
return qos_domain;
}
static int esw_qos_domain_init(struct mlx5_eswitch *esw)
{
esw->qos.domain = esw_qos_domain_alloc();
return esw->qos.domain ? 0 : -ENOMEM;
}
static void esw_qos_domain_release(struct mlx5_eswitch *esw)
{
kfree(esw->qos.domain);
esw->qos.domain = NULL;
}
enum sched_node_type {
SCHED_NODE_TYPE_VPORTS_TSAR,
SCHED_NODE_TYPE_VPORT,
SCHED_NODE_TYPE_TC_ARBITER_TSAR,
SCHED_NODE_TYPE_RATE_LIMITER,
SCHED_NODE_TYPE_VPORT_TC,
SCHED_NODE_TYPE_VPORTS_TC_TSAR,
};
static const char * const sched_node_type_str[] = {
[SCHED_NODE_TYPE_VPORTS_TSAR] = "vports TSAR",
[SCHED_NODE_TYPE_VPORT] = "vport",
[SCHED_NODE_TYPE_TC_ARBITER_TSAR] = "TC Arbiter TSAR",
[SCHED_NODE_TYPE_RATE_LIMITER] = "Rate Limiter",
[SCHED_NODE_TYPE_VPORT_TC] = "vport TC",
[SCHED_NODE_TYPE_VPORTS_TC_TSAR] = "vports TC TSAR",
};
struct mlx5_esw_sched_node {
u32 ix;
/* Bandwidth parameters. */
u32 max_rate;
u32 min_rate;
/* A computed value indicating relative min_rate between node's children. */
u32 bw_share;
/* The parent node in the rate hierarchy. */
struct mlx5_esw_sched_node *parent;
/* Entry in the parent node's children list. */
struct list_head entry;
/* The type of this node in the rate hierarchy. */
enum sched_node_type type;
/* The eswitch this node belongs to. */
struct mlx5_eswitch *esw;
/* The children nodes of this node, empty list for leaf nodes. */
struct list_head children;
/* Valid only if this node is associated with a vport. */
struct mlx5_vport *vport;
/* Level in the hierarchy. The root node level is 1. */
u8 level;
/* Valid only when this node represents a traffic class. */
u8 tc;
Annotation
- Immediate include surface: `eswitch.h`, `lib/mlx5.h`, `esw/qos.h`, `en/port.h`, `diag/qos_tracepoint.h`.
- Detected declarations: `struct mlx5_qos_domain`, `struct mlx5_esw_sched_node`, `enum sched_node_type`, `function esw_qos_lock`, `function esw_qos_unlock`, `function esw_assert_qos_lock_held`, `function esw_qos_domain_init`, `function esw_qos_domain_release`, `function esw_qos_node_attach_to_parent`, `function esw_qos_num_tcs`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.