drivers/net/ethernet/mellanox/mlx5/core/hwmon.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlx5/core/hwmon.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/mellanox/mlx5/core/hwmon.c- Extension
.c- Size
- 10868 bytes
- Lines
- 424
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/hwmon.hlinux/bitmap.hlinux/mlx5/device.hlinux/mlx5/mlx5_ifc.hlinux/mlx5/port.hmlx5_core.hhwmon.h
Detected Declarations
struct temp_channel_descstruct mlx5_hwmonfunction mlx5_hwmon_query_mtmpfunction mlx5_hwmon_reset_max_tempfunction mlx5_hwmon_enable_max_tempfunction mlx5_hwmon_readfunction mlx5_hwmon_writefunction mlx5_hwmon_is_visiblefunction mlx5_hwmon_read_stringfunction mlx5_hwmon_init_channels_namesfunction mlx5_hwmon_get_module_sensor_indexfunction mlx5_hwmon_init_sensors_indexesfunction for_each_set_bitfunction mlx5_hwmon_channel_info_initfunction mlx5_hwmon_is_module_mon_capfunction mlx5_hwmon_get_sensors_countfunction mlx5_hwmon_freefunction mlx5_hwmon_dev_initfunction mlx5_hwmon_dev_registerfunction mlx5_hwmon_dev_unregister
Annotated Snippet
struct temp_channel_desc {
u32 sensor_index;
char sensor_name[32];
};
/* chip_channel_config and channel_info arrays must be 0-terminated, hence + 1 */
struct mlx5_hwmon {
struct mlx5_core_dev *mdev;
struct device *hwmon_dev;
struct hwmon_channel_info chip_info;
u32 chip_channel_config[CHIP_CONFIG_NUM + 1];
struct hwmon_channel_info temp_info;
u32 *temp_channel_config;
const struct hwmon_channel_info *channel_info[CHANNELS_TYPE_NUM + 1];
struct hwmon_chip_info chip;
struct temp_channel_desc *temp_channel_desc;
u32 asic_platform_scount;
u32 module_scount;
};
static int mlx5_hwmon_query_mtmp(struct mlx5_core_dev *mdev, u32 sensor_index, u32 *mtmp_out)
{
u32 mtmp_in[MLX5_ST_SZ_DW(mtmp_reg)] = {};
MLX5_SET(mtmp_reg, mtmp_in, sensor_index, sensor_index);
return mlx5_core_access_reg(mdev, mtmp_in, sizeof(mtmp_in),
mtmp_out, MLX5_ST_SZ_BYTES(mtmp_reg),
MLX5_REG_MTMP, 0, 0);
}
static int mlx5_hwmon_reset_max_temp(struct mlx5_core_dev *mdev, int sensor_index)
{
u32 mtmp_out[MLX5_ST_SZ_DW(mtmp_reg)] = {};
u32 mtmp_in[MLX5_ST_SZ_DW(mtmp_reg)] = {};
MLX5_SET(mtmp_reg, mtmp_in, sensor_index, sensor_index);
MLX5_SET(mtmp_reg, mtmp_in, mtr, 1);
return mlx5_core_access_reg(mdev, mtmp_in, sizeof(mtmp_in),
mtmp_out, sizeof(mtmp_out),
MLX5_REG_MTMP, 0, 0);
}
static int mlx5_hwmon_enable_max_temp(struct mlx5_core_dev *mdev, int sensor_index)
{
u32 mtmp_out[MLX5_ST_SZ_DW(mtmp_reg)] = {};
u32 mtmp_in[MLX5_ST_SZ_DW(mtmp_reg)] = {};
int err;
err = mlx5_hwmon_query_mtmp(mdev, sensor_index, mtmp_in);
if (err)
return err;
MLX5_SET(mtmp_reg, mtmp_in, mte, 1);
return mlx5_core_access_reg(mdev, mtmp_in, sizeof(mtmp_in),
mtmp_out, sizeof(mtmp_out),
MLX5_REG_MTMP, 0, 1);
}
static int mlx5_hwmon_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
int channel, long *val)
{
struct mlx5_hwmon *hwmon = dev_get_drvdata(dev);
u32 mtmp_out[MLX5_ST_SZ_DW(mtmp_reg)] = {};
int err;
if (type != hwmon_temp)
return -EOPNOTSUPP;
err = mlx5_hwmon_query_mtmp(hwmon->mdev, hwmon->temp_channel_desc[channel].sensor_index,
mtmp_out);
if (err)
return err;
switch (attr) {
case hwmon_temp_input:
*val = mtmp_temp_to_mdeg(MLX5_GET(mtmp_reg, mtmp_out, temperature));
return 0;
case hwmon_temp_highest:
*val = mtmp_temp_to_mdeg(MLX5_GET(mtmp_reg, mtmp_out, max_temperature));
return 0;
case hwmon_temp_crit:
*val = mtmp_temp_to_mdeg(MLX5_GET(mtmp_reg, mtmp_out, temp_threshold_hi));
return 0;
default:
return -EOPNOTSUPP;
}
}
Annotation
- Immediate include surface: `linux/hwmon.h`, `linux/bitmap.h`, `linux/mlx5/device.h`, `linux/mlx5/mlx5_ifc.h`, `linux/mlx5/port.h`, `mlx5_core.h`, `hwmon.h`.
- Detected declarations: `struct temp_channel_desc`, `struct mlx5_hwmon`, `function mlx5_hwmon_query_mtmp`, `function mlx5_hwmon_reset_max_temp`, `function mlx5_hwmon_enable_max_temp`, `function mlx5_hwmon_read`, `function mlx5_hwmon_write`, `function mlx5_hwmon_is_visible`, `function mlx5_hwmon_read_string`, `function mlx5_hwmon_init_channels_names`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.