drivers/net/ethernet/mellanox/mlx5/core/main.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlx5/core/main.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/mellanox/mlx5/core/main.c- Extension
.c- Size
- 62262 bytes
- Lines
- 2388
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/highmem.hlinux/module.hlinux/init.hlinux/errno.hlinux/pci.hlinux/dma-mapping.hlinux/slab.hlinux/interrupt.hlinux/delay.hlinux/mlx5/driver.hlinux/mlx5/cq.hlinux/mlx5/qp.hlinux/debugfs.hlinux/kmod.hlinux/mlx5/mlx5_ifc.hlinux/mlx5/vport.hlinux/version.hnet/devlink.hmlx5_core.hlib/eq.hfs_core.hlib/mpfs.heswitch.hdevlink.hfw_reset.hlib/mlx5.hlib/tout.hfpga/core.hen_accel/ipsec.hlib/clock.hlib/vxlan.hlib/geneve.h
Detected Declarations
struct mlx5_reg_host_endiannessfunction wait_fw_initfunction mlx5_set_driver_versionfunction set_dma_capsfunction mlx5_pci_enable_devicefunction mlx5_pci_disable_devicefunction request_barfunction release_barfunction to_fw_pkey_szfunction mlx5_core_uplink_netdev_setfunction mlx5_core_uplink_netdev_event_replayfunction mlx5_core_mp_event_replayfunction mlx5_core_get_caps_modefunction mlx5_core_get_capsfunction set_capsfunction handle_hca_cap_atomicfunction handle_hca_cap_odpfunction MLX5_CAP_ODP_MAXfunction max_uc_list_get_devlink_paramfunction mlx5_is_roce_onfunction handle_hca_cap_2function handle_hca_capfunction is_roce_fw_disabledfunction handle_hca_cap_rocefunction handle_hca_cap_port_selectionfunction set_hca_capfunction set_hca_ctrlfunction mlx5_core_set_hca_defaultsfunction mlx5_core_enable_hcafunction mlx5_core_disable_hcafunction mlx5_core_set_issifunction mlx5_pci_initfunction mlx5_pci_closefunction mlx5_init_oncefunction mlx5_cleanup_oncefunction mlx5_function_enablefunction mlx5_function_disablefunction mlx5_function_openfunction mlx5_function_closefunction mlx5_function_setupfunction mlx5_function_teardownfunction mlx5_loadfunction mlx5_unloadfunction mlx5_init_one_devl_lockedfunction mlx5_init_onefunction mlx5_uninit_onefunction mlx5_load_one_devl_lockedfunction mlx5_load_one
Annotated Snippet
static struct pci_driver mlx5_core_driver = {
.name = KBUILD_MODNAME,
.id_table = mlx5_core_pci_table,
.probe = probe_one,
.remove = remove_one,
.suspend = mlx5_suspend,
.resume = mlx5_resume,
.shutdown = shutdown,
.err_handler = &mlx5_err_handler,
.sriov_configure = mlx5_core_sriov_configure,
.sriov_get_vf_total_msix = mlx5_sriov_get_vf_total_msix,
.sriov_set_msix_vec_count = mlx5_core_sriov_set_msix_vec_count,
};
/**
* mlx5_vf_get_core_dev - Get the mlx5 core device from a given VF PCI device if
* mlx5_core is its driver.
* @pdev: The associated PCI device.
*
* Upon return the interface state lock stay held to let caller uses it safely.
* Caller must ensure to use the returned mlx5 device for a narrow window
* and put it back with mlx5_vf_put_core_dev() immediately once usage was over.
*
* Return: Pointer to the associated mlx5_core_dev or NULL.
*/
struct mlx5_core_dev *mlx5_vf_get_core_dev(struct pci_dev *pdev)
{
struct mlx5_core_dev *mdev;
mdev = pci_iov_get_pf_drvdata(pdev, &mlx5_core_driver);
if (IS_ERR(mdev))
return NULL;
mutex_lock(&mdev->intf_state_mutex);
if (!test_bit(MLX5_INTERFACE_STATE_UP, &mdev->intf_state)) {
mutex_unlock(&mdev->intf_state_mutex);
return NULL;
}
return mdev;
}
EXPORT_SYMBOL(mlx5_vf_get_core_dev);
/**
* mlx5_vf_put_core_dev - Put the mlx5 core device back.
* @mdev: The mlx5 core device.
*
* Upon return the interface state lock is unlocked and caller should not
* access the mdev any more.
*/
void mlx5_vf_put_core_dev(struct mlx5_core_dev *mdev)
{
mutex_unlock(&mdev->intf_state_mutex);
}
EXPORT_SYMBOL(mlx5_vf_put_core_dev);
static void mlx5_core_verify_params(void)
{
if (prof_sel >= ARRAY_SIZE(profile)) {
pr_warn("mlx5_core: WARNING: Invalid module parameter prof_sel %d, valid range 0-%zu, changing back to default(%d)\n",
prof_sel,
ARRAY_SIZE(profile) - 1,
MLX5_DEFAULT_PROF);
prof_sel = MLX5_DEFAULT_PROF;
}
}
static int __init mlx5_init(void)
{
int err;
WARN_ONCE(strcmp(MLX5_ADEV_NAME, KBUILD_MODNAME),
"mlx5_core name not in sync with kernel module name");
get_random_bytes(&sw_owner_id, sizeof(sw_owner_id));
mlx5_core_verify_params();
mlx5_register_debugfs();
err = mlx5e_init();
if (err)
goto err_debug;
err = mlx5_sf_driver_register();
if (err)
goto err_sf;
err = pci_register_driver(&mlx5_core_driver);
if (err)
goto err_pci;
Annotation
- Immediate include surface: `linux/highmem.h`, `linux/module.h`, `linux/init.h`, `linux/errno.h`, `linux/pci.h`, `linux/dma-mapping.h`, `linux/slab.h`, `linux/interrupt.h`.
- Detected declarations: `struct mlx5_reg_host_endianness`, `function wait_fw_init`, `function mlx5_set_driver_version`, `function set_dma_caps`, `function mlx5_pci_enable_device`, `function mlx5_pci_disable_device`, `function request_bar`, `function release_bar`, `function to_fw_pkey_sz`, `function mlx5_core_uplink_netdev_set`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.