drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c
Extension
.c
Size
6221 bytes
Lines
258
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
/* Copyright (c) 2024 NVIDIA CORPORATION. All rights reserved. */

#include "internal.h"

bool mlx5hws_context_cap_dynamic_reparse(struct mlx5hws_context *ctx)
{
	return IS_BIT_SET(ctx->caps->rtc_reparse_mode, MLX5_IFC_RTC_REPARSE_BY_STC);
}

u8 mlx5hws_context_get_reparse_mode(struct mlx5hws_context *ctx)
{
	/* Prefer to use dynamic reparse, reparse only specific actions */
	if (mlx5hws_context_cap_dynamic_reparse(ctx))
		return MLX5_IFC_RTC_REPARSE_NEVER;

	/* Otherwise use less efficient static */
	return MLX5_IFC_RTC_REPARSE_ALWAYS;
}

static int hws_context_pools_init(struct mlx5hws_context *ctx)
{
	struct mlx5hws_pool_attr pool_attr = {0};
	u8 max_log_sz;
	int ret;

	ret = mlx5hws_pat_init_pattern_cache(&ctx->pattern_cache);
	if (ret)
		return ret;

	ret = mlx5hws_definer_init_cache(&ctx->definer_cache);
	if (ret)
		goto uninit_pat_cache;

	/* Create an STC pool per FT type */
	pool_attr.pool_type = MLX5HWS_POOL_TYPE_STC;
	max_log_sz = min(MLX5HWS_POOL_STC_LOG_SZ, ctx->caps->stc_alloc_log_max);
	pool_attr.alloc_log_sz = max(max_log_sz, ctx->caps->stc_alloc_log_gran);

	pool_attr.table_type = MLX5HWS_TABLE_TYPE_FDB;
	ctx->stc_pool = mlx5hws_pool_create(ctx, &pool_attr);
	if (!ctx->stc_pool) {
		mlx5hws_err(ctx, "Failed to allocate STC pool\n");
		ret = -ENOMEM;
		goto uninit_cache;
	}

	return 0;

uninit_cache:
	mlx5hws_definer_uninit_cache(ctx->definer_cache);
uninit_pat_cache:
	mlx5hws_pat_uninit_pattern_cache(ctx->pattern_cache);
	return ret;
}

static void hws_context_pools_uninit(struct mlx5hws_context *ctx)
{
	if (ctx->stc_pool)
		mlx5hws_pool_destroy(ctx->stc_pool);

	mlx5hws_definer_uninit_cache(ctx->definer_cache);
	mlx5hws_pat_uninit_pattern_cache(ctx->pattern_cache);
}

static int hws_context_init_pd(struct mlx5hws_context *ctx)
{
	int ret = 0;

	ret = mlx5_core_alloc_pd(ctx->mdev, &ctx->pd_num);
	if (ret) {
		mlx5hws_err(ctx, "Failed to allocate PD\n");
		return ret;
	}

	ctx->flags |= MLX5HWS_CONTEXT_FLAG_PRIVATE_PD;

	return 0;
}

static int hws_context_uninit_pd(struct mlx5hws_context *ctx)
{
	if (ctx->flags & MLX5HWS_CONTEXT_FLAG_PRIVATE_PD)
		mlx5_core_dealloc_pd(ctx->mdev, ctx->pd_num);

	return 0;
}

static void hws_context_check_hws_supp(struct mlx5hws_context *ctx)
{

Annotation

Implementation Notes