drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c
Extension
.c
Size
12513 bytes
Lines
432
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
/* Copyright (c) 2025 NVIDIA Corporation & Affiliates */

#include <mlx5_core.h>
#include "fs_hws_pools.h"

#define MLX5_FS_HWS_DEFAULT_BULK_LEN 65536
#define MLX5_FS_HWS_POOL_MAX_THRESHOLD BIT(18)
#define MLX5_FS_HWS_POOL_USED_BUFF_RATIO 10

static struct mlx5hws_action *
mlx5_fs_dl3tnltol2_bulk_action_create(struct mlx5hws_context *ctx)
{
	struct mlx5hws_action_reformat_header reformat_hdr[2] = {};
	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB;
	enum mlx5hws_action_type reformat_type;
	u32 log_bulk_size;

	reformat_type = MLX5HWS_ACTION_TYP_REFORMAT_TNL_L3_TO_L2;
	reformat_hdr[MLX5_FS_DL3TNLTOL2_MAC_HDR_IDX].sz = ETH_HLEN;
	reformat_hdr[MLX5_FS_DL3TNLTOL2_MAC_VLAN_HDR_IDX].sz = ETH_HLEN + VLAN_HLEN;

	log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN);
	return mlx5hws_action_create_reformat(ctx, reformat_type, 2,
					      reformat_hdr, log_bulk_size, flags);
}

static struct mlx5hws_action *
mlx5_fs_el2tol3tnl_bulk_action_create(struct mlx5hws_context *ctx, size_t data_size)
{
	struct mlx5hws_action_reformat_header reformat_hdr = {};
	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB;
	enum mlx5hws_action_type reformat_type;
	u32 log_bulk_size;

	reformat_type = MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L3;
	reformat_hdr.sz = data_size;

	log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN);
	return mlx5hws_action_create_reformat(ctx, reformat_type, 1,
					      &reformat_hdr, log_bulk_size, flags);
}

static struct mlx5hws_action *
mlx5_fs_el2tol2tnl_bulk_action_create(struct mlx5hws_context *ctx, size_t data_size)
{
	struct mlx5hws_action_reformat_header reformat_hdr = {};
	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB;
	enum mlx5hws_action_type reformat_type;
	u32 log_bulk_size;

	reformat_type = MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L2;
	reformat_hdr.sz = data_size;

	log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN);
	return mlx5hws_action_create_reformat(ctx, reformat_type, 1,
					      &reformat_hdr, log_bulk_size, flags);
}

static struct mlx5hws_action *
mlx5_fs_insert_hdr_bulk_action_create(struct mlx5hws_context *ctx)
{
	struct mlx5hws_action_insert_header insert_hdr = {};
	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB;
	u32 log_bulk_size;

	log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN);
	insert_hdr.hdr.sz = MLX5_FS_INSERT_HDR_VLAN_SIZE;
	insert_hdr.anchor = MLX5_FS_INSERT_HDR_VLAN_ANCHOR;
	insert_hdr.offset = MLX5_FS_INSERT_HDR_VLAN_OFFSET;

	return mlx5hws_action_create_insert_header(ctx, 1, &insert_hdr,
						   log_bulk_size, flags);
}

static struct mlx5hws_action *
mlx5_fs_pr_bulk_action_create(struct mlx5_core_dev *dev,
			      struct mlx5_fs_hws_pr_pool_ctx *pr_pool_ctx)
{
	struct mlx5_flow_root_namespace *root_ns;
	struct mlx5hws_context *ctx;
	size_t encap_data_size;

	root_ns = mlx5_get_root_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
	if (!root_ns || root_ns->mode != MLX5_FLOW_STEERING_MODE_HMFS)
		return NULL;

	ctx = root_ns->fs_hws_context.hws_ctx;
	if (!ctx)
		return NULL;

Annotation

Implementation Notes