drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h
Extension
.h
Size
12484 bytes
Lines
473
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mlx5_ifc_rtc_bits {
	u8 modify_field_select[0x40];
	u8 reserved_at_40[0x40];
	u8 update_index_mode[0x2];
	u8 reparse_mode[0x2];
	u8 num_match_ste[0x4];
	u8 pd[0x18];
	u8 reserved_at_a0[0x9];
	u8 access_index_mode[0x3];
	u8 num_hash_definer[0x4];
	u8 update_method[0x1];
	u8 reserved_at_b1[0x2];
	u8 log_depth[0x5];
	u8 log_hash_size[0x8];
	u8 ste_format_0[0x8];
	u8 table_type[0x8];
	u8 ste_format_1[0x8];
	u8 reserved_at_d8[0x8];
	u8 match_definer_0[0x20];
	u8 stc_id[0x20];
	u8 ste_table_base_id[0x20];
	u8 ste_table_offset[0x20];
	u8 reserved_at_160[0x8];
	u8 miss_flow_table_id[0x18];
	u8 match_definer_1[0x20];
	u8 reserved_at_1a0[0x260];
};

enum mlx5_ifc_stc_action_type {
	MLX5_IFC_STC_ACTION_TYPE_NOP = 0x00,
	MLX5_IFC_STC_ACTION_TYPE_COPY = 0x05,
	MLX5_IFC_STC_ACTION_TYPE_SET = 0x06,
	MLX5_IFC_STC_ACTION_TYPE_ADD = 0x07,
	MLX5_IFC_STC_ACTION_TYPE_REMOVE_WORDS = 0x08,
	MLX5_IFC_STC_ACTION_TYPE_HEADER_REMOVE = 0x09,
	MLX5_IFC_STC_ACTION_TYPE_HEADER_INSERT = 0x0b,
	MLX5_IFC_STC_ACTION_TYPE_TAG = 0x0c,
	MLX5_IFC_STC_ACTION_TYPE_ACC_MODIFY_LIST = 0x0e,
	MLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_ENCRYPTION = 0x10,
	MLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_DECRYPTION = 0x11,
	MLX5_IFC_STC_ACTION_TYPE_ASO = 0x12,
	MLX5_IFC_STC_ACTION_TYPE_TRAILER = 0x13,
	MLX5_IFC_STC_ACTION_TYPE_COUNTER = 0x14,
	MLX5_IFC_STC_ACTION_TYPE_ADD_FIELD = 0x1b,
	MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_STE_TABLE = 0x80,
	MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_TIR = 0x81,
	MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_FT = 0x82,
	MLX5_IFC_STC_ACTION_TYPE_DROP = 0x83,
	MLX5_IFC_STC_ACTION_TYPE_ALLOW = 0x84,
	MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_VPORT = 0x85,
	MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_UPLINK = 0x86,
};

enum mlx5_ifc_stc_reparse_mode {
	MLX5_IFC_STC_REPARSE_IGNORE = 0x0,
	MLX5_IFC_STC_REPARSE_NEVER = 0x1,
	MLX5_IFC_STC_REPARSE_ALWAYS = 0x2,
};

struct mlx5_ifc_stc_ste_param_ste_table_bits {
	u8 ste_obj_id[0x20];
	u8 match_definer_id[0x20];
	u8 reserved_at_40[0x3];
	u8 log_hash_size[0x5];
	u8 reserved_at_48[0x38];
};

struct mlx5_ifc_stc_ste_param_tir_bits {
	u8 reserved_at_0[0x8];
	u8 tirn[0x18];
	u8 reserved_at_20[0x60];
};

struct mlx5_ifc_stc_ste_param_table_bits {
	u8 reserved_at_0[0x8];
	u8 table_id[0x18];
	u8 reserved_at_20[0x60];
};

struct mlx5_ifc_stc_ste_param_flow_counter_bits {
	u8 flow_counter_id[0x20];
};

enum {
	MLX5_ASO_CT_NUM_PER_OBJ = 1,
	MLX5_ASO_METER_NUM_PER_OBJ = 2,
	MLX5_ASO_IPSEC_NUM_PER_OBJ = 1,
	MLX5_ASO_FIRST_HIT_NUM_PER_OBJ = 512,
};

Annotation

Implementation Notes