drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c
Extension
.c
Size
37652 bytes
Lines
1356
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (priv->rule->status == MLX5HWS_RULE_STATUS_FAILING) {
			/* Backup original RTCs */
			u32 orig_rtc_0 = priv->rule->resize_info->rtc_0;
			u32 orig_rtc_1 = priv->rule->resize_info->rtc_1;

			/* Delete partially failed move rule using resize_info */
			priv->rule->resize_info->rtc_0 = priv->rule->rtc_0;
			priv->rule->resize_info->rtc_1 = priv->rule->rtc_1;

			/* Move rule to original RTC for future delete */
			priv->rule->rtc_0 = orig_rtc_0;
			priv->rule->rtc_1 = orig_rtc_1;
		}
		/* Clean leftovers */
		mlx5hws_rule_move_hws_remove(priv->rule, queue, priv->user_data);
		break;

	case MLX5HWS_RULE_RESIZE_STATE_DELETING:
		if (priv->rule->status == MLX5HWS_RULE_STATUS_FAILING) {
			*status = MLX5HWS_FLOW_OP_ERROR;
		} else {
			*status = MLX5HWS_FLOW_OP_SUCCESS;
			priv->rule->matcher = priv->rule->matcher->resize_dst;
		}
		priv->rule->resize_info->state = MLX5HWS_RULE_RESIZE_STATE_IDLE;
		priv->rule->status = MLX5HWS_RULE_STATUS_CREATED;
		break;

	default:
		break;
	}
}

static void hws_send_engine_dump_error_cqe(struct mlx5hws_send_engine *queue,
					   struct mlx5hws_send_ring_priv *priv,
					   struct mlx5_cqe64 *cqe)
{
	u8 wqe_opcode = cqe ? be32_to_cpu(cqe->sop_drop_qpn) >> 24 : 0;
	struct mlx5hws_context *ctx = priv->rule->matcher->tbl->ctx;
	u32 opcode = cqe ? get_cqe_opcode(cqe) : 0;
	struct mlx5hws_rule *rule = priv->rule;

	/* If something bad happens and lots of rules are failing, we don't
	 * want to pollute dmesg. Print only the first bad cqe per engine,
	 * the one that started the avalanche.
	 */
	if (queue->error_cqe_printed)
		return;

	queue->error_cqe_printed = true;

	if (mlx5hws_rule_move_in_progress(rule))
		mlx5hws_err(ctx,
			    "--- rule 0x%08llx: error completion moving rule: phase %s, wqes left %d\n",
			    HWS_PTR_TO_ID(rule),
			    rule->resize_info->state ==
			    MLX5HWS_RULE_RESIZE_STATE_WRITING ? "WRITING" :
			    rule->resize_info->state ==
			    MLX5HWS_RULE_RESIZE_STATE_DELETING ? "DELETING" :
			    "UNKNOWN",
			    rule->pending_wqes);
	else
		mlx5hws_err(ctx,
			    "--- rule 0x%08llx: error completion %s (%d), wqes left %d\n",
			    HWS_PTR_TO_ID(rule),
			    rule->status ==
			    MLX5HWS_RULE_STATUS_CREATING ? "CREATING" :
			    rule->status ==
			    MLX5HWS_RULE_STATUS_DELETING ? "DELETING" :
			    rule->status ==
			    MLX5HWS_RULE_STATUS_FAILING ? "FAILING" :
			    rule->status ==
			    MLX5HWS_RULE_STATUS_UPDATING ? "UPDATING" : "NA",
			    rule->status,
			    rule->pending_wqes);

	mlx5hws_err(ctx, "    rule 0x%08llx: matcher 0x%llx %s\n",
		    HWS_PTR_TO_ID(rule),
		    HWS_PTR_TO_ID(rule->matcher),
		    (rule->matcher->flags & MLX5HWS_MATCHER_FLAGS_ISOLATED) ?
		    "(isolated)" : "");

	if (!cqe) {
		mlx5hws_err(ctx, "    rule 0x%08llx: no CQE\n",
			    HWS_PTR_TO_ID(rule));
		return;
	}

	mlx5hws_err(ctx, "    rule 0x%08llx: cqe->opcode      = %d %s\n",
		    HWS_PTR_TO_ID(rule), opcode,

Annotation

Implementation Notes