drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr_ste_v1.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr_ste_v1.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr_ste_v1.h- Extension
.h- Size
- 11836 bytes
- Lines
- 470
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct mlx5_ifc_ste_single_action_flow_tag_v1_bitsstruct mlx5_ifc_ste_single_action_modify_list_v1_bitsstruct mlx5_ifc_ste_single_action_remove_header_v1_bitsstruct mlx5_ifc_ste_single_action_remove_header_size_v1_bitsstruct mlx5_ifc_ste_double_action_copy_v1_bitsstruct mlx5_ifc_ste_double_action_set_v1_bitsstruct mlx5_ifc_ste_double_action_add_v1_bitsstruct mlx5_ifc_ste_double_action_insert_with_inline_v1_bitsstruct mlx5_ifc_ste_double_action_insert_with_ptr_v1_bitsstruct mlx5_ifc_ste_double_action_accelerated_modify_action_list_v1_bitsstruct mlx5_ifc_ste_match_bwc_v1_bitsstruct mlx5_ifc_ste_mask_and_match_v1_bitsstruct mlx5_ifc_ste_match_ranges_v1_bitsstruct mlx5_ifc_ste_eth_l2_src_v1_bitsstruct mlx5_ifc_ste_eth_l2_dst_v1_bitsstruct mlx5_ifc_ste_eth_l2_src_dst_v1_bitsstruct mlx5_ifc_ste_eth_l3_ipv4_5_tuple_v1_bitsstruct mlx5_ifc_ste_eth_l2_tnl_v1_bitsstruct mlx5_ifc_ste_eth_l3_ipv4_misc_v1_bitsstruct mlx5_ifc_ste_eth_l4_v1_bitsstruct mlx5_ifc_ste_eth_l4_misc_v1_bitsstruct mlx5_ifc_ste_mpls_v1_bitsstruct mlx5_ifc_ste_gre_v1_bitsstruct mlx5_ifc_ste_src_gvmi_qp_v1_bitsstruct mlx5_ifc_ste_icmp_v1_bitsenum mlx5_ifc_ste_v1_modify_hdr_offset
Annotated Snippet
struct mlx5_ifc_ste_single_action_flow_tag_v1_bits {
u8 action_id[0x8];
u8 flow_tag[0x18];
};
struct mlx5_ifc_ste_single_action_modify_list_v1_bits {
u8 action_id[0x8];
u8 num_of_modify_actions[0x8];
u8 modify_actions_ptr[0x10];
};
struct mlx5_ifc_ste_single_action_remove_header_v1_bits {
u8 action_id[0x8];
u8 reserved_at_8[0x2];
u8 start_anchor[0x6];
u8 reserved_at_10[0x2];
u8 end_anchor[0x6];
u8 reserved_at_18[0x4];
u8 decap[0x1];
u8 vni_to_cqe[0x1];
u8 qos_profile[0x2];
};
struct mlx5_ifc_ste_single_action_remove_header_size_v1_bits {
u8 action_id[0x8];
u8 reserved_at_8[0x2];
u8 start_anchor[0x6];
u8 outer_l4_remove[0x1];
u8 reserved_at_11[0x1];
u8 start_offset[0x7];
u8 reserved_at_18[0x1];
u8 remove_size[0x6];
};
struct mlx5_ifc_ste_double_action_copy_v1_bits {
u8 action_id[0x8];
u8 destination_dw_offset[0x8];
u8 reserved_at_10[0x2];
u8 destination_left_shifter[0x6];
u8 reserved_at_17[0x2];
u8 destination_length[0x6];
u8 reserved_at_20[0x8];
u8 source_dw_offset[0x8];
u8 reserved_at_30[0x2];
u8 source_right_shifter[0x6];
u8 reserved_at_38[0x8];
};
struct mlx5_ifc_ste_double_action_set_v1_bits {
u8 action_id[0x8];
u8 destination_dw_offset[0x8];
u8 reserved_at_10[0x2];
u8 destination_left_shifter[0x6];
u8 reserved_at_18[0x2];
u8 destination_length[0x6];
u8 inline_data[0x20];
};
struct mlx5_ifc_ste_double_action_add_v1_bits {
u8 action_id[0x8];
u8 destination_dw_offset[0x8];
u8 reserved_at_10[0x2];
u8 destination_left_shifter[0x6];
u8 reserved_at_18[0x2];
u8 destination_length[0x6];
u8 add_value[0x20];
};
struct mlx5_ifc_ste_double_action_insert_with_inline_v1_bits {
u8 action_id[0x8];
u8 reserved_at_8[0x2];
u8 start_anchor[0x6];
u8 start_offset[0x7];
u8 reserved_at_17[0x9];
u8 inline_data[0x20];
};
struct mlx5_ifc_ste_double_action_insert_with_ptr_v1_bits {
u8 action_id[0x8];
u8 reserved_at_8[0x2];
u8 start_anchor[0x6];
u8 start_offset[0x7];
u8 size[0x6];
u8 attributes[0x3];
u8 pointer[0x20];
Annotation
- Detected declarations: `struct mlx5_ifc_ste_single_action_flow_tag_v1_bits`, `struct mlx5_ifc_ste_single_action_modify_list_v1_bits`, `struct mlx5_ifc_ste_single_action_remove_header_v1_bits`, `struct mlx5_ifc_ste_single_action_remove_header_size_v1_bits`, `struct mlx5_ifc_ste_double_action_copy_v1_bits`, `struct mlx5_ifc_ste_double_action_set_v1_bits`, `struct mlx5_ifc_ste_double_action_add_v1_bits`, `struct mlx5_ifc_ste_double_action_insert_with_inline_v1_bits`, `struct mlx5_ifc_ste_double_action_insert_with_ptr_v1_bits`, `struct mlx5_ifc_ste_double_action_accelerated_modify_action_list_v1_bits`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.