drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h
Extension
.h
Size
6733 bytes
Lines
210
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mlxbf_gige_stats {
	u64 hw_access_errors;
	u64 tx_invalid_checksums;
	u64 tx_small_frames;
	u64 tx_index_errors;
	u64 sw_config_errors;
	u64 sw_access_errors;
	u64 rx_truncate_errors;
	u64 rx_mac_errors;
	u64 rx_din_dropped_pkts;
	u64 tx_fifo_full;
	u64 rx_filter_passed_pkts;
	u64 rx_filter_discard_pkts;
};

struct mlxbf_gige_reg_param {
	u32 mask;
	u32 shift;
};

struct mlxbf_gige_mdio_gw {
	u32 gw_address;
	u32 read_data_address;
	struct mlxbf_gige_reg_param busy;
	struct mlxbf_gige_reg_param write_data;
	struct mlxbf_gige_reg_param read_data;
	struct mlxbf_gige_reg_param devad;
	struct mlxbf_gige_reg_param partad;
	struct mlxbf_gige_reg_param opcode;
	struct mlxbf_gige_reg_param st1;
};

struct mlxbf_gige_link_cfg {
	void (*set_phy_link_mode)(struct phy_device *phydev);
	void (*adjust_link)(struct net_device *netdev);
	phy_interface_t phy_mode;
};

struct mlxbf_gige {
	void __iomem *base;
	void __iomem *llu_base;
	void __iomem *plu_base;
	struct device *dev;
	struct net_device *netdev;
	struct platform_device *pdev;
	void __iomem *mdio_io;
	void __iomem *clk_io;
	struct mii_bus *mdiobus;
	spinlock_t lock;      /* for packet processing indices */
	u16 rx_q_entries;
	u16 tx_q_entries;
	u64 *tx_wqe_base;
	dma_addr_t tx_wqe_base_dma;
	u64 *tx_wqe_next;
	u64 *tx_cc;
	dma_addr_t tx_cc_dma;
	dma_addr_t *rx_wqe_base;
	dma_addr_t rx_wqe_base_dma;
	u64 *rx_cqe_base;
	dma_addr_t rx_cqe_base_dma;
	u16 tx_pi;
	u16 prev_tx_ci;
	struct sk_buff *rx_skb[MLXBF_GIGE_MAX_RXQ_SZ];
	struct sk_buff *tx_skb[MLXBF_GIGE_MAX_TXQ_SZ];
	int error_irq;
	int rx_irq;
	int llu_plu_irq;
	int phy_irq;
	int hw_phy_irq;
	bool promisc_enabled;
	u8 valid_polarity;
	struct napi_struct napi;
	struct mlxbf_gige_stats stats;
	u8 hw_version;
	struct mlxbf_gige_mdio_gw *mdio_gw;
	int prev_speed;
};

/* Rx Work Queue Element definitions */
#define MLXBF_GIGE_RX_WQE_SZ                   8

/* Rx Completion Queue Element definitions */
#define MLXBF_GIGE_RX_CQE_SZ                   8
#define MLXBF_GIGE_RX_CQE_PKT_LEN_MASK         GENMASK(10, 0)
#define MLXBF_GIGE_RX_CQE_VALID_MASK           GENMASK(11, 11)
#define MLXBF_GIGE_RX_CQE_PKT_STATUS_MASK      GENMASK(15, 12)
#define MLXBF_GIGE_RX_CQE_PKT_STATUS_MAC_ERR   GENMASK(12, 12)
#define MLXBF_GIGE_RX_CQE_PKT_STATUS_TRUNCATED GENMASK(13, 13)
#define MLXBF_GIGE_RX_CQE_CHKSUM_MASK          GENMASK(31, 16)

Annotation

Implementation Notes