drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h

File Facts

System

Linux kernel

Corpus path

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h

Extension

.h

Size

2174 bytes

Lines

54

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• linux/bitfield.h

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __MLXBF_GIGE_MDIO_BF2_H__
#define __MLXBF_GIGE_MDIO_BF2_H__

#include <linux/bitfield.h>

#define MLXBF2_GIGE_MDIO_GW_OFFSET	0x0
#define MLXBF2_GIGE_MDIO_CFG_OFFSET	0x4

/* MDIO GW register bits */
#define MLXBF2_GIGE_MDIO_GW_AD_MASK	GENMASK(15, 0)
#define MLXBF2_GIGE_MDIO_GW_DEVAD_MASK	GENMASK(20, 16)
#define MLXBF2_GIGE_MDIO_GW_PARTAD_MASK	GENMASK(25, 21)
#define MLXBF2_GIGE_MDIO_GW_OPCODE_MASK	GENMASK(27, 26)
#define MLXBF2_GIGE_MDIO_GW_ST1_MASK	GENMASK(28, 28)
#define MLXBF2_GIGE_MDIO_GW_BUSY_MASK	GENMASK(30, 30)

#define MLXBF2_GIGE_MDIO_GW_AD_SHIFT     0
#define MLXBF2_GIGE_MDIO_GW_DEVAD_SHIFT  16
#define MLXBF2_GIGE_MDIO_GW_PARTAD_SHIFT 21
#define MLXBF2_GIGE_MDIO_GW_OPCODE_SHIFT 26
#define MLXBF2_GIGE_MDIO_GW_ST1_SHIFT    28
#define MLXBF2_GIGE_MDIO_GW_BUSY_SHIFT   30

/* MDIO config register bits */
#define MLXBF2_GIGE_MDIO_CFG_MDIO_MODE_MASK		GENMASK(1, 0)
#define MLXBF2_GIGE_MDIO_CFG_MDIO3_3_MASK		GENMASK(2, 2)
#define MLXBF2_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK	GENMASK(4, 4)
#define MLXBF2_GIGE_MDIO_CFG_MDC_PERIOD_MASK		GENMASK(15, 8)
#define MLXBF2_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK		GENMASK(23, 16)
#define MLXBF2_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK		GENMASK(31, 24)

#define MLXBF2_GIGE_MDIO_CFG_VAL (FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_MODE_MASK, 1) | \
				 FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO3_3_MASK, 1) | \
				 FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK, 1) | \
				 FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK, 6) | \
				 FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK, 13))

#endif /* __MLXBF_GIGE_MDIO_BF2_H__ */

Annotation

• Immediate include surface: `linux/bitfield.h`.
• Atlas domain: Driver Families / drivers/net.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.