drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h- Extension
.h- Size
- 2056 bytes
- Lines
- 55
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
linux/bitfield.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __MLXBF_GIGE_MDIO_BF3_H__
#define __MLXBF_GIGE_MDIO_BF3_H__
#include <linux/bitfield.h>
#define MLXBF3_GIGE_MDIO_GW_OFFSET 0x80
#define MLXBF3_GIGE_MDIO_DATA_READ 0x8c
#define MLXBF3_GIGE_MDIO_CFG_REG0 0x100
#define MLXBF3_GIGE_MDIO_CFG_REG1 0x104
#define MLXBF3_GIGE_MDIO_CFG_REG2 0x108
/* MDIO GW register bits */
#define MLXBF3_GIGE_MDIO_GW_ST1_MASK GENMASK(1, 1)
#define MLXBF3_GIGE_MDIO_GW_OPCODE_MASK GENMASK(3, 2)
#define MLXBF3_GIGE_MDIO_GW_PARTAD_MASK GENMASK(8, 4)
#define MLXBF3_GIGE_MDIO_GW_DEVAD_MASK GENMASK(13, 9)
/* For BlueField-3, this field is only used for mdio write */
#define MLXBF3_GIGE_MDIO_GW_DATA_MASK GENMASK(29, 14)
#define MLXBF3_GIGE_MDIO_GW_BUSY_MASK GENMASK(30, 30)
#define MLXBF3_GIGE_MDIO_GW_DATA_READ_MASK GENMASK(15, 0)
#define MLXBF3_GIGE_MDIO_GW_ST1_SHIFT 1
#define MLXBF3_GIGE_MDIO_GW_OPCODE_SHIFT 2
#define MLXBF3_GIGE_MDIO_GW_PARTAD_SHIFT 4
#define MLXBF3_GIGE_MDIO_GW_DEVAD_SHIFT 9
#define MLXBF3_GIGE_MDIO_GW_DATA_SHIFT 14
#define MLXBF3_GIGE_MDIO_GW_BUSY_SHIFT 30
#define MLXBF3_GIGE_MDIO_GW_DATA_READ_SHIFT 0
/* MDIO config register bits */
#define MLXBF3_GIGE_MDIO_CFG_MDIO_MODE_MASK GENMASK(1, 0)
#define MLXBF3_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK GENMASK(2, 2)
#define MLXBF3_GIGE_MDIO_CFG_MDC_PERIOD_MASK GENMASK(7, 0)
#define MLXBF3_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK GENMASK(7, 0)
#define MLXBF3_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK GENMASK(15, 8)
#endif /* __MLXBF_GIGE_MDIO_BF3_H__ */
Annotation
- Immediate include surface: `linux/bitfield.h`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.