drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_regs.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_regs.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_regs.c
Extension
.c
Size
7055 bytes
Lines
223
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+
/* Microchip lan969x Switch driver
 *
 * Copyright (c) 2024 Microchip Technology Inc.
 */

/* This file is autogenerated by cml-utils 2024-09-30 11:48:29 +0200.
 * Commit ID: 9d07b8d19363f3cd3590ddb3f7a2e2768e16524b
 */

#include "lan969x.h"

const unsigned int lan969x_tsize[TSIZE_LAST] = {
	[TC_DEV10G] = 10,
	[TC_DEV2G5] = 28,
	[TC_DEV5G] = 4,
	[TC_PCS10G_BR] = 10,
	[TC_PCS5G_BR] = 4,
};

const unsigned int lan969x_raddr[RADDR_LAST] = {
	[RA_CPU_PROC_CTRL] = 160,
	[RA_GCB_SOFT_RST] = 12,
	[RA_GCB_HW_SGPIO_TO_SD_MAP_CFG] = 20,
};

const unsigned int lan969x_rcnt[RCNT_LAST] = {
	[RC_ANA_AC_OWN_UPSID] = 1,
	[RC_ANA_ACL_VCAP_S2_CFG] = 35,
	[RC_ANA_ACL_OWN_UPSID] = 1,
	[RC_ANA_CL_OWN_UPSID] = 1,
	[RC_ANA_L2_OWN_UPSID] = 1,
	[RC_ASM_PORT_CFG] = 32,
	[RC_DSM_BUF_CFG] = 32,
	[RC_DSM_DEV_TX_STOP_WM_CFG] = 32,
	[RC_DSM_RX_PAUSE_CFG] = 32,
	[RC_DSM_MAC_CFG] = 32,
	[RC_DSM_MAC_ADDR_BASE_HIGH_CFG] = 30,
	[RC_DSM_MAC_ADDR_BASE_LOW_CFG] = 30,
	[RC_DSM_TAXI_CAL_CFG] = 6,
	[RC_GCB_HW_SGPIO_TO_SD_MAP_CFG] = 30,
	[RC_HSCH_PORT_MODE] = 35,
	[RC_QFWD_SWITCH_PORT_MODE] = 35,
	[RC_QSYS_PAUSE_CFG] = 35,
	[RC_QSYS_ATOP] = 35,
	[RC_QSYS_FWD_PRESSURE] = 35,
	[RC_QSYS_CAL_AUTO] = 4,
	[RC_REW_OWN_UPSID] = 1,
	[RC_REW_RTAG_ETAG_CTRL] = 35,
};

const unsigned int lan969x_gaddr[GADDR_LAST] = {
	[GA_ANA_AC_RAM_CTRL] = 202000,
	[GA_ANA_AC_PS_COMMON] = 202880,
	[GA_ANA_AC_MIRROR_PROBE] = 203232,
	[GA_ANA_AC_SRC] = 201728,
	[GA_ANA_AC_PGID] = 131072,
	[GA_ANA_AC_TSN_SF] = 202028,
	[GA_ANA_AC_TSN_SF_CFG] = 148480,
	[GA_ANA_AC_TSN_SF_STATUS] = 147936,
	[GA_ANA_AC_SG_ACCESS] = 202032,
	[GA_ANA_AC_SG_CONFIG] = 202752,
	[GA_ANA_AC_SG_STATUS] = 147952,
	[GA_ANA_AC_SG_STATUS_STICKY] = 202044,
	[GA_ANA_AC_STAT_GLOBAL_CFG_PORT] = 202048,
	[GA_ANA_AC_STAT_CNT_CFG_PORT] = 204800,
	[GA_ANA_AC_STAT_GLOBAL_CFG_ACL] = 202068,
	[GA_ANA_ACL_COMMON] = 8192,
	[GA_ANA_ACL_KEY_SEL] = 9204,
	[GA_ANA_ACL_CNT_B] = 4096,
	[GA_ANA_ACL_STICKY] = 10852,
	[GA_ANA_AC_POL_POL_ALL_CFG] = 17504,
	[GA_ANA_AC_POL_COMMON_BDLB] = 19464,
	[GA_ANA_AC_POL_COMMON_BUM_SLB] = 19472,
	[GA_ANA_AC_SDLB_LBGRP_TBL] = 31788,
	[GA_ANA_CL_PORT] = 65536,
	[GA_ANA_CL_COMMON] = 87040,
	[GA_ANA_L2_COMMON] = 561928,
	[GA_ANA_L3_COMMON] = 370752,
	[GA_ANA_L3_VLAN_ARP_L3MC_STICKY] = 368580,
	[GA_ASM_CFG] = 18304,
	[GA_ASM_PFC_TIMER_CFG] = 15568,
	[GA_ASM_LBK_WM_CFG] = 15596,
	[GA_ASM_LBK_MISC_CFG] = 15608,
	[GA_ASM_RAM_CTRL] = 15684,
	[GA_EACL_ES2_KEY_SELECT_PROFILE] = 36864,
	[GA_EACL_CNT_TBL] = 30720,
	[GA_EACL_POL_CFG] = 38400,
	[GA_EACL_ES2_STICKY] = 29072,
	[GA_EACL_RAM_CTRL] = 29112,

Annotation

Implementation Notes