drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c- Extension
.c- Size
- 4542 bytes
- Lines
- 158
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/phylink.hlinux/device.hlinux/netdevice.hlinux/sfp.hsparx5_main_regs.hsparx5_main.hsparx5_port.h
Detected Declarations
function Copyrightfunction sparx5_phylink_mac_select_pcsfunction sparx5_phylink_mac_configfunction sparx5_phylink_mac_link_downfunction sparx5_pcs_get_statefunction sparx5_pcs_configfunction sparx5_pcs_aneg_restart
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/* Microchip Sparx5 Switch driver
*
* Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
*/
#include <linux/module.h>
#include <linux/phylink.h>
#include <linux/device.h>
#include <linux/netdevice.h>
#include <linux/sfp.h>
#include "sparx5_main_regs.h"
#include "sparx5_main.h"
#include "sparx5_port.h"
static bool port_conf_has_changed(struct sparx5_port_config *a, struct sparx5_port_config *b)
{
if (a->speed != b->speed ||
a->portmode != b->portmode ||
a->autoneg != b->autoneg ||
a->pause_adv != b->pause_adv ||
a->power_down != b->power_down ||
a->media != b->media)
return true;
return false;
}
static struct phylink_pcs *
sparx5_phylink_mac_select_pcs(struct phylink_config *config,
phy_interface_t interface)
{
struct sparx5_port *port = netdev_priv(to_net_dev(config->dev));
/* Return the PCS for all the modes that require it. */
switch (interface) {
case PHY_INTERFACE_MODE_SGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_1000BASEX:
case PHY_INTERFACE_MODE_2500BASEX:
case PHY_INTERFACE_MODE_5GBASER:
case PHY_INTERFACE_MODE_10GBASER:
case PHY_INTERFACE_MODE_25GBASER:
return &port->phylink_pcs;
default:
return NULL;
}
}
static void sparx5_phylink_mac_config(struct phylink_config *config,
unsigned int mode,
const struct phylink_link_state *state)
{
/* Currently not used */
}
static void sparx5_phylink_mac_link_up(struct phylink_config *config,
struct phy_device *phy,
unsigned int mode,
phy_interface_t interface,
int speed, int duplex,
bool tx_pause, bool rx_pause)
{
struct sparx5_port *port = netdev_priv(to_net_dev(config->dev));
struct sparx5_port_config conf;
int err;
conf = port->conf;
conf.duplex = duplex;
conf.pause = 0;
conf.pause |= tx_pause ? MLO_PAUSE_TX : 0;
conf.pause |= rx_pause ? MLO_PAUSE_RX : 0;
conf.speed = speed;
/* Configure the port to speed/duplex/pause */
err = sparx5_port_config(port->sparx5, port, &conf);
if (err)
netdev_err(port->ndev, "port config failed: %d\n", err);
}
static void sparx5_phylink_mac_link_down(struct phylink_config *config,
unsigned int mode,
phy_interface_t interface)
{
/* Currently not used */
}
static struct sparx5_port *sparx5_pcs_to_port(struct phylink_pcs *pcs)
{
return container_of(pcs, struct sparx5_port, phylink_pcs);
}
Annotation
- Immediate include surface: `linux/module.h`, `linux/phylink.h`, `linux/device.h`, `linux/netdevice.h`, `linux/sfp.h`, `sparx5_main_regs.h`, `sparx5_main.h`, `sparx5_port.h`.
- Detected declarations: `function Copyright`, `function sparx5_phylink_mac_select_pcs`, `function sparx5_phylink_mac_config`, `function sparx5_phylink_mac_link_down`, `function sparx5_pcs_get_state`, `function sparx5_pcs_config`, `function sparx5_pcs_aneg_restart`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.