drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c
Extension
.c
Size
9106 bytes
Lines
339
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+
/* Microchip Sparx5 Switch driver
 *
 * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 */

#include "sparx5_main_regs.h"
#include "sparx5_main.h"

#define SPX5_PSFP_SF_CNT 1024
#define SPX5_PSFP_SG_CONFIG_CHANGE_SLEEP 1000
#define SPX5_PSFP_SG_CONFIG_CHANGE_TIMEO 100000

/* Pool of available service policers */
static struct sparx5_pool_entry sparx5_psfp_fm_pool[SPX5_SDLB_CNT];

/* Pool of available stream gates */
static struct sparx5_pool_entry sparx5_psfp_sg_pool[SPX5_PSFP_SG_CNT];

/* Pool of available stream filters */
static struct sparx5_pool_entry sparx5_psfp_sf_pool[SPX5_PSFP_SF_CNT];

static int sparx5_psfp_sf_get(struct sparx5 *sparx5, u32 *id)
{
	return sparx5_pool_get(sparx5_psfp_sf_pool,
			       sparx5->data->consts->n_filters, id);
}

static int sparx5_psfp_sf_put(struct sparx5 *sparx5, u32 id)
{
	return sparx5_pool_put(sparx5_psfp_sf_pool,
			       sparx5->data->consts->n_filters, id);
}

static int sparx5_psfp_sg_get(struct sparx5 *sparx5, u32 idx, u32 *id)
{
	return sparx5_pool_get_with_idx(sparx5_psfp_sg_pool,
					sparx5->data->consts->n_gates, idx, id);
}

static int sparx5_psfp_sg_put(struct sparx5 *sparx5, u32 id)
{
	return sparx5_pool_put(sparx5_psfp_sg_pool,
			       sparx5->data->consts->n_gates, id);
}

static int sparx5_psfp_fm_get(struct sparx5 *sparx5, u32 idx, u32 *id)
{
	return sparx5_pool_get_with_idx(sparx5_psfp_fm_pool,
					sparx5->data->consts->n_sdlbs, idx, id);
}

static int sparx5_psfp_fm_put(struct sparx5 *sparx5, u32 id)
{
	return sparx5_pool_put(sparx5_psfp_fm_pool,
			       sparx5->data->consts->n_sdlbs, id);
}

u32 sparx5_psfp_isdx_get_sf(struct sparx5 *sparx5, u32 isdx)
{
	return ANA_L2_TSN_CFG_TSN_SFID_GET(spx5_rd(sparx5,
						   ANA_L2_TSN_CFG(isdx)));
}

u32 sparx5_psfp_isdx_get_fm(struct sparx5 *sparx5, u32 isdx)
{
	return ANA_L2_DLB_CFG_DLB_IDX_GET(spx5_rd(sparx5,
						  ANA_L2_DLB_CFG(isdx)));
}

u32 sparx5_psfp_sf_get_sg(struct sparx5 *sparx5, u32 sfid)
{
	return ANA_AC_TSN_SF_CFG_TSN_SGID_GET(spx5_rd(sparx5,
						      ANA_AC_TSN_SF_CFG(sfid)));
}

void sparx5_isdx_conf_set(struct sparx5 *sparx5, u32 isdx, u32 sfid, u32 fmid)
{
	spx5_rmw(ANA_L2_TSN_CFG_TSN_SFID_SET(sfid), ANA_L2_TSN_CFG_TSN_SFID,
		 sparx5, ANA_L2_TSN_CFG(isdx));

	spx5_rmw(ANA_L2_DLB_CFG_DLB_IDX_SET(fmid), ANA_L2_DLB_CFG_DLB_IDX,
		 sparx5, ANA_L2_DLB_CFG(isdx));
}

/* Internal priority value to internal priority selector */
static u32 sparx5_psfp_ipv_to_ips(s32 ipv)
{
	return ipv > 0 ? (ipv | BIT(3)) : 0;
}

Annotation

Implementation Notes