drivers/net/ethernet/microchip/sparx5/sparx5_regs.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/microchip/sparx5/sparx5_regs.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/microchip/sparx5/sparx5_regs.c
Extension
.c
Size
7094 bytes
Lines
223
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+
/* Microchip Sparx5 Switch driver
 *
 * Copyright (c) 2024 Microchip Technology Inc.
 */

/* This file is autogenerated by cml-utils 2024-09-30 11:48:29 +0200.
 * Commit ID: 9d07b8d19363f3cd3590ddb3f7a2e2768e16524b
 */

#include "sparx5_regs.h"

const unsigned int sparx5_tsize[TSIZE_LAST] = {
	[TC_DEV10G] = 12,
	[TC_DEV2G5] = 65,
	[TC_DEV5G] = 13,
	[TC_PCS10G_BR] = 12,
	[TC_PCS5G_BR] = 13,
};

const unsigned int sparx5_raddr[RADDR_LAST] = {
	[RA_CPU_PROC_CTRL] = 176,
	[RA_GCB_SOFT_RST] = 8,
	[RA_GCB_HW_SGPIO_TO_SD_MAP_CFG] = 24,
};

const unsigned int sparx5_rcnt[RCNT_LAST] = {
	[RC_ANA_AC_OWN_UPSID] = 3,
	[RC_ANA_ACL_VCAP_S2_CFG] = 70,
	[RC_ANA_ACL_OWN_UPSID] = 3,
	[RC_ANA_CL_OWN_UPSID] = 3,
	[RC_ANA_L2_OWN_UPSID] = 3,
	[RC_ASM_PORT_CFG] = 67,
	[RC_DSM_BUF_CFG] = 67,
	[RC_DSM_DEV_TX_STOP_WM_CFG] = 67,
	[RC_DSM_RX_PAUSE_CFG] = 67,
	[RC_DSM_MAC_CFG] = 67,
	[RC_DSM_MAC_ADDR_BASE_HIGH_CFG] = 65,
	[RC_DSM_MAC_ADDR_BASE_LOW_CFG] = 65,
	[RC_DSM_TAXI_CAL_CFG] = 9,
	[RC_GCB_HW_SGPIO_TO_SD_MAP_CFG] = 65,
	[RC_HSCH_PORT_MODE] = 70,
	[RC_QFWD_SWITCH_PORT_MODE] = 70,
	[RC_QSYS_PAUSE_CFG] = 70,
	[RC_QSYS_ATOP] = 70,
	[RC_QSYS_FWD_PRESSURE] = 70,
	[RC_QSYS_CAL_AUTO] = 7,
	[RC_REW_OWN_UPSID] = 3,
	[RC_REW_RTAG_ETAG_CTRL] = 70,
};

const unsigned int sparx5_gaddr[GADDR_LAST] = {
	[GA_ANA_AC_RAM_CTRL] = 839108,
	[GA_ANA_AC_PS_COMMON] = 894472,
	[GA_ANA_AC_MIRROR_PROBE] = 893696,
	[GA_ANA_AC_SRC] = 849920,
	[GA_ANA_AC_PGID] = 786432,
	[GA_ANA_AC_TSN_SF] = 839136,
	[GA_ANA_AC_TSN_SF_CFG] = 839680,
	[GA_ANA_AC_TSN_SF_STATUS] = 839072,
	[GA_ANA_AC_SG_ACCESS] = 839140,
	[GA_ANA_AC_SG_CONFIG] = 851584,
	[GA_ANA_AC_SG_STATUS] = 839088,
	[GA_ANA_AC_SG_STATUS_STICKY] = 839152,
	[GA_ANA_AC_STAT_GLOBAL_CFG_PORT] = 851552,
	[GA_ANA_AC_STAT_CNT_CFG_PORT] = 843776,
	[GA_ANA_AC_STAT_GLOBAL_CFG_ACL] = 893792,
	[GA_ANA_ACL_COMMON] = 32768,
	[GA_ANA_ACL_KEY_SEL] = 34200,
	[GA_ANA_ACL_CNT_B] = 16384,
	[GA_ANA_ACL_STICKY] = 36408,
	[GA_ANA_AC_POL_POL_ALL_CFG] = 75968,
	[GA_ANA_AC_POL_COMMON_BDLB] = 79048,
	[GA_ANA_AC_POL_COMMON_BUM_SLB] = 79056,
	[GA_ANA_AC_SDLB_LBGRP_TBL] = 295468,
	[GA_ANA_CL_PORT] = 131072,
	[GA_ANA_CL_COMMON] = 166912,
	[GA_ANA_L2_COMMON] = 566024,
	[GA_ANA_L3_COMMON] = 493632,
	[GA_ANA_L3_VLAN_ARP_L3MC_STICKY] = 491460,
	[GA_ASM_CFG] = 33280,
	[GA_ASM_PFC_TIMER_CFG] = 34716,
	[GA_ASM_LBK_WM_CFG] = 34744,
	[GA_ASM_LBK_MISC_CFG] = 34756,
	[GA_ASM_RAM_CTRL] = 34832,
	[GA_EACL_ES2_KEY_SELECT_PROFILE] = 149504,
	[GA_EACL_CNT_TBL] = 122880,
	[GA_EACL_POL_CFG] = 150608,
	[GA_EACL_ES2_STICKY] = 118696,
	[GA_EACL_RAM_CTRL] = 118736,

Annotation

Implementation Notes