drivers/net/ethernet/mscc/ocelot_io.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mscc/ocelot_io.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/mscc/ocelot_io.c
Extension
.c
Size
4045 bytes
Lines
169
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Microsemi Ocelot Switch driver
 *
 * Copyright (c) 2017 Microsemi Corporation
 */
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>

#include "ocelot.h"

int __ocelot_bulk_read_ix(struct ocelot *ocelot, enum ocelot_reg reg,
			  u32 offset, void *buf, int count)
{
	enum ocelot_target target;
	u32 addr;

	ocelot_reg_to_target_addr(ocelot, reg, &target, &addr);
	WARN_ON(!target);

	return regmap_bulk_read(ocelot->targets[target], addr + offset,
				buf, count);
}
EXPORT_SYMBOL_GPL(__ocelot_bulk_read_ix);

u32 __ocelot_read_ix(struct ocelot *ocelot, enum ocelot_reg reg, u32 offset)
{
	enum ocelot_target target;
	u32 addr, val;

	ocelot_reg_to_target_addr(ocelot, reg, &target, &addr);
	WARN_ON(!target);

	regmap_read(ocelot->targets[target], addr + offset, &val);
	return val;
}
EXPORT_SYMBOL_GPL(__ocelot_read_ix);

void __ocelot_write_ix(struct ocelot *ocelot, u32 val, enum ocelot_reg reg,
		       u32 offset)
{
	enum ocelot_target target;
	u32 addr;

	ocelot_reg_to_target_addr(ocelot, reg, &target, &addr);
	WARN_ON(!target);

	regmap_write(ocelot->targets[target], addr + offset, val);
}
EXPORT_SYMBOL_GPL(__ocelot_write_ix);

void __ocelot_rmw_ix(struct ocelot *ocelot, u32 val, u32 mask,
		     enum ocelot_reg reg, u32 offset)
{
	enum ocelot_target target;
	u32 addr;

	ocelot_reg_to_target_addr(ocelot, reg, &target, &addr);
	WARN_ON(!target);

	regmap_update_bits(ocelot->targets[target], addr + offset, mask, val);
}
EXPORT_SYMBOL_GPL(__ocelot_rmw_ix);

u32 ocelot_port_readl(struct ocelot_port *port, enum ocelot_reg reg)
{
	struct ocelot *ocelot = port->ocelot;
	u16 target = reg >> TARGET_OFFSET;
	u32 val;

	WARN_ON(!target);

	regmap_read(port->target, ocelot->map[target][reg & REG_MASK], &val);
	return val;
}
EXPORT_SYMBOL_GPL(ocelot_port_readl);

void ocelot_port_writel(struct ocelot_port *port, u32 val, enum ocelot_reg reg)
{
	struct ocelot *ocelot = port->ocelot;
	u16 target = reg >> TARGET_OFFSET;

	WARN_ON(!target);

	regmap_write(port->target, ocelot->map[target][reg & REG_MASK], val);
}
EXPORT_SYMBOL_GPL(ocelot_port_writel);

void ocelot_port_rmwl(struct ocelot_port *port, u32 val, u32 mask,

Annotation

Implementation Notes