drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c
Extension
.c
Size
10335 bytes
Lines
407
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2022 - 2025 Mucse Corporation. */

#include <linux/errno.h>
#include <linux/bitfield.h>
#include <linux/iopoll.h>

#include "rnpgbe_mbx.h"

/**
 * mbx_data_rd32 - Reads reg with base mbx->fwpf_shm_base
 * @mbx: pointer to the MBX structure
 * @reg: register offset
 *
 * Return: register value
 **/
static u32 mbx_data_rd32(struct mucse_mbx_info *mbx, u32 reg)
{
	struct mucse_hw *hw = container_of(mbx, struct mucse_hw, mbx);

	return readl(hw->hw_addr + mbx->fwpf_shm_base + reg);
}

/**
 * mbx_data_wr32 - Writes value to reg with base mbx->fwpf_shm_base
 * @mbx: pointer to the MBX structure
 * @reg: register offset
 * @value: value to be written
 *
 **/
static void mbx_data_wr32(struct mucse_mbx_info *mbx, u32 reg, u32 value)
{
	struct mucse_hw *hw = container_of(mbx, struct mucse_hw, mbx);

	writel(value, hw->hw_addr + mbx->fwpf_shm_base + reg);
}

/**
 * mbx_ctrl_rd32 - Reads reg with base mbx->fwpf_ctrl_base
 * @mbx: pointer to the MBX structure
 * @reg: register offset
 *
 * Return: register value
 **/
static u32 mbx_ctrl_rd32(struct mucse_mbx_info *mbx, u32 reg)
{
	struct mucse_hw *hw = container_of(mbx, struct mucse_hw, mbx);

	return readl(hw->hw_addr + mbx->fwpf_ctrl_base + reg);
}

/**
 * mbx_ctrl_wr32 - Writes value to reg with base mbx->fwpf_ctrl_base
 * @mbx: pointer to the MBX structure
 * @reg: register offset
 * @value: value to be written
 *
 **/
static void mbx_ctrl_wr32(struct mucse_mbx_info *mbx, u32 reg, u32 value)
{
	struct mucse_hw *hw = container_of(mbx, struct mucse_hw, mbx);

	writel(value, hw->hw_addr + mbx->fwpf_ctrl_base + reg);
}

/**
 * mucse_mbx_get_lock_pf - Write ctrl and read back lock status
 * @hw: pointer to the HW structure
 *
 * Return: register value after write
 **/
static u32 mucse_mbx_get_lock_pf(struct mucse_hw *hw)
{
	struct mucse_mbx_info *mbx = &hw->mbx;
	u32 reg = MUCSE_MBX_PF2FW_CTRL(mbx);

	mbx_ctrl_wr32(mbx, reg, MUCSE_MBX_PFU);

	return mbx_ctrl_rd32(mbx, reg);
}

/**
 * mucse_obtain_mbx_lock_pf - Obtain mailbox lock
 * @hw: pointer to the HW structure
 *
 * Pair with mucse_release_mbx_lock_pf()
 * This function maybe used in an irq handler.
 *
 * Return: 0 on success, negative errno on failure
 **/

Annotation

Implementation Notes