drivers/net/ethernet/natsemi/natsemi.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/natsemi/natsemi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/natsemi/natsemi.c- Extension
.c- Size
- 95526 bytes
- Lines
- 3384
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/kernel.hlinux/string.hlinux/timer.hlinux/errno.hlinux/ioport.hlinux/slab.hlinux/interrupt.hlinux/pci.hlinux/netdevice.hlinux/etherdevice.hlinux/skbuff.hlinux/init.hlinux/spinlock.hlinux/ethtool.hlinux/delay.hlinux/rtnetlink.hlinux/mii.hlinux/crc32.hlinux/bitops.hlinux/prefetch.hasm/processor.hasm/io.hasm/irq.hlinux/uaccess.h
Detected Declarations
struct netdev_descstruct netdev_privateenum register_offsetsenum pci_register_offsetsenum ChipCmd_bitsenum ChipConfig_bitsenum EECtrl_bitsenum PCIBusCfg_bitsenum IntrStatus_bitsenum TxConfig_bitsenum RxConfig_bitsenum ClkRun_bitsenum WolCmd_bitsenum RxFilterAddr_bitsenum StatsCtrl_bitsenum MIntrCtrl_bitsenum PhyCtrl_bitsenum desc_status_bitsenum EEPROM_Cmdsfunction natsemi_show_dspcfg_workaroundfunction natsemi_set_dspcfg_workaroundfunction natsemi_irq_enablefunction natsemi_irq_disablefunction move_int_phyfunction natsemi_init_mediafunction natsemi_probe1function eeprom_readfunction mii_getbitfunction mii_send_bitsfunction miiport_readfunction miiport_writefunction mdio_readfunction mdio_writefunction init_phy_fixupfunction switch_port_externalfunction switch_port_internalfunction find_miifunction natsemi_resetfunction reset_rxfunction natsemi_reload_eepromfunction natsemi_stop_rxtxfunction netdev_openfunction do_cable_magicfunction undo_cable_magicfunction check_linkfunction init_registersfunction statefunction dump_ring
Annotated Snippet
static const struct net_device_ops natsemi_netdev_ops = {
.ndo_open = netdev_open,
.ndo_stop = netdev_close,
.ndo_start_xmit = start_tx,
.ndo_get_stats = get_stats,
.ndo_set_rx_mode = set_rx_mode,
.ndo_change_mtu = natsemi_change_mtu,
.ndo_eth_ioctl = netdev_ioctl,
.ndo_tx_timeout = ns_tx_timeout,
.ndo_set_mac_address = eth_mac_addr,
.ndo_validate_addr = eth_validate_addr,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = natsemi_poll_controller,
#endif
};
static int natsemi_probe1(struct pci_dev *pdev, const struct pci_device_id *ent)
{
struct net_device *dev;
struct netdev_private *np;
int i, option, irq, chip_idx = ent->driver_data;
static int find_cnt = -1;
resource_size_t iostart;
unsigned long iosize;
void __iomem *ioaddr;
const int pcibar = 1; /* PCI base address register */
u8 addr[ETH_ALEN];
int prev_eedata;
u32 tmp;
/* when built into the kernel, we only print version if device is found */
#ifndef MODULE
static int printed_version;
if (!printed_version++)
printk(version);
#endif
i = pcim_enable_device(pdev);
if (i) return i;
/* natsemi has a non-standard PM control register
* in PCI config space. Some boards apparently need
* to be brought to D0 in this manner.
*/
pci_read_config_dword(pdev, PCIPM, &tmp);
if (tmp & PCI_PM_CTRL_STATE_MASK) {
/* D0 state, disable PME assertion */
u32 newtmp = tmp & ~PCI_PM_CTRL_STATE_MASK;
pci_write_config_dword(pdev, PCIPM, newtmp);
}
find_cnt++;
iostart = pci_resource_start(pdev, pcibar);
iosize = pci_resource_len(pdev, pcibar);
irq = pdev->irq;
pci_set_master(pdev);
dev = alloc_etherdev(sizeof (struct netdev_private));
if (!dev)
return -ENOMEM;
SET_NETDEV_DEV(dev, &pdev->dev);
i = pcim_request_all_regions(pdev, DRV_NAME);
if (i)
goto err_pci_request_regions;
ioaddr = ioremap(iostart, iosize);
if (!ioaddr) {
i = -ENOMEM;
goto err_pci_request_regions;
}
/* Work around the dropped serial bit. */
prev_eedata = eeprom_read(ioaddr, 6);
for (i = 0; i < 3; i++) {
int eedata = eeprom_read(ioaddr, i + 7);
addr[i*2] = (eedata << 1) + (prev_eedata >> 15);
addr[i*2+1] = eedata >> 7;
prev_eedata = eedata;
}
eth_hw_addr_set(dev, addr);
np = netdev_priv(dev);
np->ioaddr = ioaddr;
netif_napi_add(dev, &np->napi, natsemi_poll);
np->dev = dev;
np->pci_dev = pdev;
Annotation
- Immediate include surface: `linux/module.h`, `linux/kernel.h`, `linux/string.h`, `linux/timer.h`, `linux/errno.h`, `linux/ioport.h`, `linux/slab.h`, `linux/interrupt.h`.
- Detected declarations: `struct netdev_desc`, `struct netdev_private`, `enum register_offsets`, `enum pci_register_offsets`, `enum ChipCmd_bits`, `enum ChipConfig_bits`, `enum EECtrl_bits`, `enum PCIBusCfg_bits`, `enum IntrStatus_bits`, `enum TxConfig_bits`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.