drivers/net/ethernet/oa_tc6.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/oa_tc6.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/oa_tc6.c- Extension
.c- Size
- 38029 bytes
- Lines
- 1406
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/iopoll.hlinux/interrupt.hlinux/mdio.hlinux/phy.hlinux/oa_tc6.h
Detected Declarations
struct oa_tc6enum oa_tc6_header_typeenum oa_tc6_register_openum oa_tc6_data_valid_infoenum oa_tc6_data_start_valid_infoenum oa_tc6_data_end_valid_infofunction oa_tc6_spi_transferfunction oa_tc6_get_parityfunction oa_tc6_prepare_ctrl_headerfunction oa_tc6_update_ctrl_write_datafunction oa_tc6_calculate_ctrl_buf_sizefunction oa_tc6_prepare_ctrl_spi_buffunction oa_tc6_check_ctrl_write_replyfunction oa_tc6_check_ctrl_read_replyfunction oa_tc6_copy_ctrl_read_datafunction oa_tc6_perform_ctrlfunction oa_tc6_read_registersfunction oa_tc6_read_registerfunction oa_tc6_write_registersfunction oa_tc6_write_registerfunction oa_tc6_check_phy_reg_direct_access_capabilityfunction oa_tc6_handle_link_changefunction oa_tc6_mdiobus_readfunction oa_tc6_mdiobus_writefunction oa_tc6_get_phy_c45_mmsfunction oa_tc6_mdiobus_read_c45function oa_tc6_mdiobus_write_c45function oa_tc6_mdiobus_registerfunction oa_tc6_mdiobus_unregisterfunction oa_tc6_phy_initfunction oa_tc6_phy_exitfunction oa_tc6_read_status0function oa_tc6_sw_reset_macphyfunction oa_tc6_unmask_macphy_error_interruptsfunction oa_tc6_enable_data_transferfunction oa_tc6_cleanup_ongoing_rx_skbfunction oa_tc6_cleanup_ongoing_tx_skbfunction oa_tc6_cleanup_waiting_tx_skbfunction oa_tc6_free_pending_skbsfunction oa_tc6_disable_trafficfunction oa_tc6_process_extended_statusfunction oa_tc6_process_rx_chunk_footerfunction oa_tc6_submit_rx_skbfunction oa_tc6_update_rx_skbfunction oa_tc6_allocate_rx_skbfunction oa_tc6_prcs_complete_rx_framefunction oa_tc6_prcs_rx_frame_startfunction oa_tc6_prcs_rx_frame_end
Annotated Snippet
struct oa_tc6 {
struct net_device *netdev;
struct phy_device *phydev;
struct mii_bus *mdiobus;
struct spi_device *spi;
struct mutex spi_ctrl_lock; /* Protects spi control transfer */
spinlock_t tx_skb_lock; /* Protects tx skb handling */
void *spi_ctrl_tx_buf;
void *spi_ctrl_rx_buf;
void *spi_data_tx_buf;
void *spi_data_rx_buf;
struct sk_buff *ongoing_tx_skb;
struct sk_buff *waiting_tx_skb;
struct sk_buff *rx_skb;
u16 tx_skb_offset;
u16 spi_data_tx_buf_offset;
u16 tx_credits;
u8 rx_chunks_available;
bool rx_buf_overflow;
bool int_flag;
bool disable_traffic;
};
enum oa_tc6_header_type {
OA_TC6_CTRL_HEADER,
OA_TC6_DATA_HEADER,
};
enum oa_tc6_register_op {
OA_TC6_CTRL_REG_READ = 0,
OA_TC6_CTRL_REG_WRITE = 1,
};
enum oa_tc6_data_valid_info {
OA_TC6_DATA_INVALID,
OA_TC6_DATA_VALID,
};
enum oa_tc6_data_start_valid_info {
OA_TC6_DATA_START_INVALID,
OA_TC6_DATA_START_VALID,
};
enum oa_tc6_data_end_valid_info {
OA_TC6_DATA_END_INVALID,
OA_TC6_DATA_END_VALID,
};
static int oa_tc6_spi_transfer(struct oa_tc6 *tc6,
enum oa_tc6_header_type header_type, u16 length)
{
struct spi_transfer xfer = { 0 };
struct spi_message msg;
if (header_type == OA_TC6_DATA_HEADER) {
xfer.tx_buf = tc6->spi_data_tx_buf;
xfer.rx_buf = tc6->spi_data_rx_buf;
} else {
xfer.tx_buf = tc6->spi_ctrl_tx_buf;
xfer.rx_buf = tc6->spi_ctrl_rx_buf;
}
xfer.len = length;
spi_message_init(&msg);
spi_message_add_tail(&xfer, &msg);
return spi_sync(tc6->spi, &msg);
}
static int oa_tc6_get_parity(u32 p)
{
/* Public domain code snippet, lifted from
* http://www-graphics.stanford.edu/~seander/bithacks.html
*/
p ^= p >> 1;
p ^= p >> 2;
p = (p & 0x11111111U) * 0x11111111U;
/* Odd parity is used here */
return !((p >> 28) & 1);
}
static __be32 oa_tc6_prepare_ctrl_header(u32 addr, u8 length,
enum oa_tc6_register_op reg_op)
{
u32 header;
header = FIELD_PREP(OA_TC6_CTRL_HEADER_DATA_NOT_CTRL,
OA_TC6_CTRL_HEADER) |
FIELD_PREP(OA_TC6_CTRL_HEADER_WRITE_NOT_READ, reg_op) |
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/iopoll.h`, `linux/interrupt.h`, `linux/mdio.h`, `linux/phy.h`, `linux/oa_tc6.h`.
- Detected declarations: `struct oa_tc6`, `enum oa_tc6_header_type`, `enum oa_tc6_register_op`, `enum oa_tc6_data_valid_info`, `enum oa_tc6_data_start_valid_info`, `enum oa_tc6_data_end_valid_info`, `function oa_tc6_spi_transfer`, `function oa_tc6_get_parity`, `function oa_tc6_prepare_ctrl_header`, `function oa_tc6_update_ctrl_write_data`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.