drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.h- Extension
.h- Size
- 9703 bytes
- Lines
- 270
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct netxen_adapter
Annotated Snippet
#ifndef __NETXEN_NIC_HW_H_
#define __NETXEN_NIC_HW_H_
/* Hardware memory size of 128 meg */
#define NETXEN_MEMADDR_MAX (128 * 1024 * 1024)
struct netxen_adapter;
#define NETXEN_PCI_MAPSIZE_BYTES (NETXEN_PCI_MAPSIZE << 20)
void netxen_nic_set_link_parameters(struct netxen_adapter *adapter);
/* Nibble or Byte mode for phy interface (GbE mode only) */
#define _netxen_crb_get_bit(var, bit) ((var >> bit) & 0x1)
/*
* NIU GB MAC Config Register 0 (applies to GB0, GB1, GB2, GB3)
*
* Bit 0 : enable_tx => 1:enable frame xmit, 0:disable
* Bit 1 : tx_synced => R/O: xmit enable synched to xmit stream
* Bit 2 : enable_rx => 1:enable frame recv, 0:disable
* Bit 3 : rx_synced => R/O: recv enable synched to recv stream
* Bit 4 : tx_flowctl => 1:enable pause frame generation, 0:disable
* Bit 5 : rx_flowctl => 1:act on recv'd pause frames, 0:ignore
* Bit 8 : loopback => 1:loop MAC xmits to MAC recvs, 0:normal
* Bit 16: tx_reset_pb => 1:reset frame xmit protocol blk, 0:no-op
* Bit 17: rx_reset_pb => 1:reset frame recv protocol blk, 0:no-op
* Bit 18: tx_reset_mac => 1:reset data/ctl multiplexer blk, 0:no-op
* Bit 19: rx_reset_mac => 1:reset ctl frames & timers blk, 0:no-op
* Bit 31: soft_reset => 1:reset the MAC and the SERDES, 0:no-op
*/
#define netxen_gb_tx_flowctl(config_word) \
((config_word) |= 1 << 4)
#define netxen_gb_rx_flowctl(config_word) \
((config_word) |= 1 << 5)
#define netxen_gb_tx_reset_pb(config_word) \
((config_word) |= 1 << 16)
#define netxen_gb_rx_reset_pb(config_word) \
((config_word) |= 1 << 17)
#define netxen_gb_tx_reset_mac(config_word) \
((config_word) |= 1 << 18)
#define netxen_gb_rx_reset_mac(config_word) \
((config_word) |= 1 << 19)
#define netxen_gb_unset_tx_flowctl(config_word) \
((config_word) &= ~(1 << 4))
#define netxen_gb_unset_rx_flowctl(config_word) \
((config_word) &= ~(1 << 5))
#define netxen_gb_get_tx_synced(config_word) \
_netxen_crb_get_bit((config_word), 1)
#define netxen_gb_get_rx_synced(config_word) \
_netxen_crb_get_bit((config_word), 3)
#define netxen_gb_get_tx_flowctl(config_word) \
_netxen_crb_get_bit((config_word), 4)
#define netxen_gb_get_rx_flowctl(config_word) \
_netxen_crb_get_bit((config_word), 5)
#define netxen_gb_get_soft_reset(config_word) \
_netxen_crb_get_bit((config_word), 31)
#define netxen_gb_get_stationaddress_low(config_word) ((config_word) >> 16)
#define netxen_gb_set_mii_mgmt_clockselect(config_word, val) \
((config_word) |= ((val) & 0x07))
#define netxen_gb_mii_mgmt_reset(config_word) \
((config_word) |= 1 << 31)
#define netxen_gb_mii_mgmt_unset(config_word) \
((config_word) &= ~(1 << 31))
/*
* NIU GB MII Mgmt Command Register (applies to GB0, GB1, GB2, GB3)
* Bit 0 : read_cycle => 1:perform single read cycle, 0:no-op
* Bit 1 : scan_cycle => 1:perform continuous read cycles, 0:no-op
*/
#define netxen_gb_mii_mgmt_set_read_cycle(config_word) \
((config_word) |= 1 << 0)
#define netxen_gb_mii_mgmt_reg_addr(config_word, val) \
((config_word) |= ((val) & 0x1F))
#define netxen_gb_mii_mgmt_phy_addr(config_word, val) \
((config_word) |= (((val) & 0x1F) << 8))
/*
* NIU GB MII Mgmt Indicators Register (applies to GB0, GB1, GB2, GB3)
* Read-only register.
* Bit 0 : busy => 1:performing an MII mgmt cycle, 0:idle
* Bit 1 : scanning => 1:scan operation in progress, 0:idle
* Bit 2 : notvalid => :mgmt result data not yet valid, 0:idle
Annotation
- Detected declarations: `struct netxen_adapter`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.