drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h
Extension
.h
Size
42041 bytes
Lines
1461
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dbg_attn_bit_mapping {
	u16 data;
#define DBG_ATTN_BIT_MAPPING_VAL_MASK			0x7FFF
#define DBG_ATTN_BIT_MAPPING_VAL_SHIFT			0
#define DBG_ATTN_BIT_MAPPING_IS_UNUSED_BIT_CNT_MASK	0x1
#define DBG_ATTN_BIT_MAPPING_IS_UNUSED_BIT_CNT_SHIFT	15
};

/* Attention block per-type data */
struct dbg_attn_block_type_data {
	u16 names_offset;
	u16 reserved1;
	u8 num_regs;
	u8 reserved2;
	u16 regs_offset;

};

/* Block attentions */
struct dbg_attn_block {
	struct dbg_attn_block_type_data per_type_data[2];
};

/* Attention register result */
struct dbg_attn_reg_result {
	u32 data;
#define DBG_ATTN_REG_RESULT_STS_ADDRESS_MASK	0xFFFFFF
#define DBG_ATTN_REG_RESULT_STS_ADDRESS_SHIFT	0
#define DBG_ATTN_REG_RESULT_NUM_REG_ATTN_MASK	0xFF
#define DBG_ATTN_REG_RESULT_NUM_REG_ATTN_SHIFT	24
	u16 block_attn_offset;
	u16 reserved;
	u32 sts_val;
	u32 mask_val;
};

/* Attention block result */
struct dbg_attn_block_result {
	u8 block_id;
	u8 data;
#define DBG_ATTN_BLOCK_RESULT_ATTN_TYPE_MASK	0x3
#define DBG_ATTN_BLOCK_RESULT_ATTN_TYPE_SHIFT	0
#define DBG_ATTN_BLOCK_RESULT_NUM_REGS_MASK	0x3F
#define DBG_ATTN_BLOCK_RESULT_NUM_REGS_SHIFT	2
	u16 names_offset;
	struct dbg_attn_reg_result reg_results[15];
};

/* Mode header */
struct dbg_mode_hdr {
	u16 data;
#define DBG_MODE_HDR_EVAL_MODE_MASK		0x1
#define DBG_MODE_HDR_EVAL_MODE_SHIFT		0
#define DBG_MODE_HDR_MODES_BUF_OFFSET_MASK	0x7FFF
#define DBG_MODE_HDR_MODES_BUF_OFFSET_SHIFT	1
};

/* Attention register */
struct dbg_attn_reg {
	struct dbg_mode_hdr mode;
	u16 block_attn_offset;
	u32 data;
#define DBG_ATTN_REG_STS_ADDRESS_MASK	0xFFFFFF
#define DBG_ATTN_REG_STS_ADDRESS_SHIFT	0
#define DBG_ATTN_REG_NUM_REG_ATTN_MASK	0xFF
#define DBG_ATTN_REG_NUM_REG_ATTN_SHIFT 24
	u32 sts_clr_address;
	u32 mask_address;
};

/* Attention types */
enum dbg_attn_type {
	ATTN_TYPE_INTERRUPT,
	ATTN_TYPE_PARITY,
	MAX_DBG_ATTN_TYPE
};

/* Block debug data */
struct dbg_block {
	u8 name[15];
	u8 associated_storm_letter;
};

/* Chip-specific block debug data */
struct dbg_block_chip {
	u8 flags;
#define DBG_BLOCK_CHIP_IS_REMOVED_MASK		 0x1
#define DBG_BLOCK_CHIP_IS_REMOVED_SHIFT		 0
#define DBG_BLOCK_CHIP_HAS_RESET_REG_MASK	 0x1
#define DBG_BLOCK_CHIP_HAS_RESET_REG_SHIFT	 1

Annotation

Implementation Notes