drivers/net/ethernet/qlogic/qed/qed_fcoe.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/qed/qed_fcoe.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/qlogic/qed/qed_fcoe.c- Extension
.c- Size
- 29638 bytes
- Lines
- 1046
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hasm/byteorder.hasm/param.hlinux/delay.hlinux/dma-mapping.hlinux/interrupt.hlinux/kernel.hlinux/log2.hlinux/module.hlinux/pci.hlinux/slab.hlinux/stddef.hlinux/string.hlinux/workqueue.hlinux/errno.hlinux/list.hlinux/spinlock.hqed.hqed_cxt.hqed_dev_api.hqed_fcoe.hqed_hsi.hqed_hw.hqed_int.hqed_iro_hsi.hqed_ll2.hqed_mcp.hqed_reg_addr.hqed_sp.hqed_sriov.hlinux/qed/qed_fcoe_if.h
Detected Declarations
struct qed_fcoe_connstruct qed_hash_fcoe_confunction qed_sp_fcoe_func_startfunction qed_sp_fcoe_conn_offloadfunction qed_sp_fcoe_conn_destroyfunction qed_sp_fcoe_func_stopfunction qed_fcoe_allocate_connectionfunction qed_fcoe_free_connectionfunction qed_fcoe_allocfunction qed_fcoe_setupfunction qed_fcoe_freefunction qed_fcoe_acquire_connectionfunction qed_fcoe_release_connectionfunction _qed_fcoe_get_tstatsfunction _qed_fcoe_get_pstatsfunction qed_fcoe_get_statsfunction qed_fill_fcoe_dev_infofunction qed_register_fcoe_opsfunction hash_for_each_possiblefunction qed_fcoe_stopfunction qed_fcoe_startfunction qed_fcoe_acquire_connfunction qed_fcoe_release_connfunction qed_fcoe_offload_connfunction qed_fcoe_destroy_connfunction qed_fcoe_stats_contextfunction qed_fcoe_statsfunction qed_get_protocol_stats_fcoefunction qed_put_fcoe_opsexport qed_get_fcoe_opsexport qed_put_fcoe_ops
Annotated Snippet
struct qed_fcoe_conn {
struct list_head list_entry;
bool free_on_delete;
u16 conn_id;
u32 icid;
u32 fw_cid;
u8 layer_code;
dma_addr_t sq_pbl_addr;
dma_addr_t sq_curr_page_addr;
dma_addr_t sq_next_page_addr;
dma_addr_t xferq_pbl_addr;
void *xferq_pbl_addr_virt_addr;
dma_addr_t xferq_addr[4];
void *xferq_addr_virt_addr[4];
dma_addr_t confq_pbl_addr;
void *confq_pbl_addr_virt_addr;
dma_addr_t confq_addr[2];
void *confq_addr_virt_addr[2];
dma_addr_t terminate_params;
u16 dst_mac_addr_lo;
u16 dst_mac_addr_mid;
u16 dst_mac_addr_hi;
u16 src_mac_addr_lo;
u16 src_mac_addr_mid;
u16 src_mac_addr_hi;
u16 tx_max_fc_pay_len;
u16 e_d_tov_timer_val;
u16 rec_tov_timer_val;
u16 rx_max_fc_pay_len;
u16 vlan_tag;
u16 physical_q0;
struct fc_addr_nw s_id;
u8 max_conc_seqs_c3;
struct fc_addr_nw d_id;
u8 flags;
u8 def_q_idx;
};
static int
qed_sp_fcoe_func_start(struct qed_hwfn *p_hwfn,
enum spq_mode comp_mode,
struct qed_spq_comp_cb *p_comp_addr)
{
struct qed_fcoe_pf_params *fcoe_pf_params = NULL;
struct fcoe_init_ramrod_params *p_ramrod = NULL;
struct fcoe_init_func_ramrod_data *p_data;
struct fcoe_conn_context *p_cxt = NULL;
struct qed_spq_entry *p_ent = NULL;
struct qed_sp_init_data init_data;
struct qed_cxt_info cxt_info;
u32 dummy_cid;
int rc = 0;
__le16 tmp;
u8 i;
/* Get SPQ entry */
memset(&init_data, 0, sizeof(init_data));
init_data.cid = qed_spq_get_cid(p_hwfn);
init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
init_data.comp_mode = comp_mode;
init_data.p_comp_data = p_comp_addr;
rc = qed_sp_init_request(p_hwfn, &p_ent,
FCOE_RAMROD_CMD_ID_INIT_FUNC,
PROTOCOLID_FCOE, &init_data);
if (rc)
return rc;
p_ramrod = &p_ent->ramrod.fcoe_init;
p_data = &p_ramrod->init_ramrod_data;
fcoe_pf_params = &p_hwfn->pf_params.fcoe_pf_params;
/* Sanity */
if (fcoe_pf_params->num_cqs > p_hwfn->hw_info.feat_num[QED_FCOE_CQ]) {
DP_ERR(p_hwfn,
"Cannot satisfy CQ amount. CQs requested %d, CQs available %d. Aborting function start\n",
fcoe_pf_params->num_cqs,
p_hwfn->hw_info.feat_num[QED_FCOE_CQ]);
rc = -EINVAL;
goto err;
}
p_data->mtu = cpu_to_le16(fcoe_pf_params->mtu);
tmp = cpu_to_le16(fcoe_pf_params->sq_num_pbl_pages);
Annotation
- Immediate include surface: `linux/types.h`, `asm/byteorder.h`, `asm/param.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/interrupt.h`, `linux/kernel.h`, `linux/log2.h`.
- Detected declarations: `struct qed_fcoe_conn`, `struct qed_hash_fcoe_con`, `function qed_sp_fcoe_func_start`, `function qed_sp_fcoe_conn_offload`, `function qed_sp_fcoe_conn_destroy`, `function qed_sp_fcoe_func_stop`, `function qed_fcoe_allocate_connection`, `function qed_fcoe_free_connection`, `function qed_fcoe_alloc`, `function qed_fcoe_setup`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.