drivers/net/ethernet/qlogic/qed/qed_hw.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/qed/qed_hw.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/qlogic/qed/qed_hw.h- Extension
.h- Size
- 6860 bytes
- Lines
- 328
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/bitops.hlinux/slab.hlinux/string.hqed.hqed_dev_api.h
Detected Declarations
struct qed_pttenum reserved_pttsenum _dmae_cmd_dst_maskenum _dmae_cmd_src_maskenum _dmae_cmd_crc_mask
Annotated Snippet
#ifndef _QED_HW_H
#define _QED_HW_H
#include <linux/types.h>
#include <linux/bitops.h>
#include <linux/slab.h>
#include <linux/string.h>
#include "qed.h"
#include "qed_dev_api.h"
/* Forward decleration */
struct qed_ptt;
enum reserved_ptts {
RESERVED_PTT_EDIAG,
RESERVED_PTT_USER_SPACE,
RESERVED_PTT_MAIN,
RESERVED_PTT_DPC,
RESERVED_PTT_MAX
};
enum _dmae_cmd_dst_mask {
DMAE_CMD_DST_MASK_NONE = 0,
DMAE_CMD_DST_MASK_PCIE = 1,
DMAE_CMD_DST_MASK_GRC = 2
};
enum _dmae_cmd_src_mask {
DMAE_CMD_SRC_MASK_PCIE = 0,
DMAE_CMD_SRC_MASK_GRC = 1
};
enum _dmae_cmd_crc_mask {
DMAE_CMD_COMP_CRC_EN_MASK_NONE = 0,
DMAE_CMD_COMP_CRC_EN_MASK_SET = 1
};
/* definitions for DMA constants */
#define DMAE_GO_VALUE 0x1
#define DMAE_COMPLETION_VAL 0xD1AE
#define DMAE_CMD_ENDIANITY 0x2
#define DMAE_CMD_SIZE 14
#define DMAE_CMD_SIZE_TO_FILL (DMAE_CMD_SIZE - 5)
#define DMAE_MIN_WAIT_TIME 0x2
#define DMAE_MAX_CLIENTS 32
/**
* qed_gtt_init(): Initialize GTT windows.
*
* @p_hwfn: HW device data.
*
* Return: Void.
*/
void qed_gtt_init(struct qed_hwfn *p_hwfn);
/**
* qed_ptt_pool_alloc(): Allocate and initialize PTT pool.
*
* @p_hwfn: HW device data.
*
* Return: struct _qed_status - success (0), negative - error.
*/
int qed_ptt_pool_alloc(struct qed_hwfn *p_hwfn);
/**
* qed_ptt_pool_free(): Free PTT pool.
*
* @p_hwfn: HW device data.
*
* Return: Void.
*/
void qed_ptt_pool_free(struct qed_hwfn *p_hwfn);
/**
* qed_ptt_get_hw_addr(): Get PTT's GRC/HW address.
*
* @p_hwfn: HW device data.
* @p_ptt: P_ptt
*
* Return: u32.
*/
u32 qed_ptt_get_hw_addr(struct qed_hwfn *p_hwfn,
struct qed_ptt *p_ptt);
/**
* qed_ptt_get_bar_addr(): Get PPT's external BAR address.
*
* @p_ptt: P_ptt
Annotation
- Immediate include surface: `linux/types.h`, `linux/bitops.h`, `linux/slab.h`, `linux/string.h`, `qed.h`, `qed_dev_api.h`.
- Detected declarations: `struct qed_ptt`, `enum reserved_ptts`, `enum _dmae_cmd_dst_mask`, `enum _dmae_cmd_src_mask`, `enum _dmae_cmd_crc_mask`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.