drivers/net/ethernet/qlogic/qed/qed_int.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/qed/qed_int.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/qlogic/qed/qed_int.h- Extension
.h- Size
- 12000 bytes
- Lines
- 460
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/slab.hqed.h
Detected Declarations
struct igu_ctrl_regstruct qed_igu_blockstruct qed_igu_infoenum igu_ctrl_cmdenum qed_coalescing_fsm
Annotated Snippet
struct igu_ctrl_reg {
u32 ctrl_data;
#define IGU_CTRL_REG_FID_MASK 0xFFFF /* Opaque_FID */
#define IGU_CTRL_REG_FID_SHIFT 0
#define IGU_CTRL_REG_PXP_ADDR_MASK 0xFFF /* Command address */
#define IGU_CTRL_REG_PXP_ADDR_SHIFT 16
#define IGU_CTRL_REG_RESERVED_MASK 0x1
#define IGU_CTRL_REG_RESERVED_SHIFT 28
#define IGU_CTRL_REG_TYPE_MASK 0x1 /* use enum igu_ctrl_cmd */
#define IGU_CTRL_REG_TYPE_SHIFT 31
};
enum qed_coalescing_fsm {
QED_COAL_RX_STATE_MACHINE,
QED_COAL_TX_STATE_MACHINE
};
/**
* qed_int_igu_enable_int(): Enable device interrupts.
*
* @p_hwfn: HW device data.
* @p_ptt: P_ptt.
* @int_mode: Interrupt mode to use.
*
* Return: Void.
*/
void qed_int_igu_enable_int(struct qed_hwfn *p_hwfn,
struct qed_ptt *p_ptt,
enum qed_int_mode int_mode);
/**
* qed_int_igu_disable_int(): Disable device interrupts.
*
* @p_hwfn: HW device data.
* @p_ptt: P_ptt.
*
* Return: Void.
*/
void qed_int_igu_disable_int(struct qed_hwfn *p_hwfn,
struct qed_ptt *p_ptt);
/**
* qed_int_igu_read_sisr_reg(): Reads the single isr multiple dpc
* register from igu.
*
* @p_hwfn: HW device data.
*
* Return: u64.
*/
u64 qed_int_igu_read_sisr_reg(struct qed_hwfn *p_hwfn);
#define QED_SP_SB_ID 0xffff
/**
* qed_int_sb_init(): Initializes the sb_info structure.
*
* @p_hwfn: HW device data.
* @p_ptt: P_ptt.
* @sb_info: points to an uninitialized (but allocated) sb_info structure
* @sb_virt_addr: SB Virtual address.
* @sb_phy_addr: SB Physial address.
* @sb_id: the sb_id to be used (zero based in driver)
* should use QED_SP_SB_ID for SP Status block
*
* Return: int.
*
* Once the structure is initialized it can be passed to sb related functions.
*/
int qed_int_sb_init(struct qed_hwfn *p_hwfn,
struct qed_ptt *p_ptt,
struct qed_sb_info *sb_info,
void *sb_virt_addr,
dma_addr_t sb_phy_addr,
u16 sb_id);
/**
* qed_int_sb_setup(): Setup the sb.
*
* @p_hwfn: HW device data.
* @p_ptt: P_ptt.
* @sb_info: Initialized sb_info structure.
*
* Return: Void.
*/
void qed_int_sb_setup(struct qed_hwfn *p_hwfn,
struct qed_ptt *p_ptt,
struct qed_sb_info *sb_info);
/**
* qed_int_sb_release(): Releases the sb_info structure.
*
* @p_hwfn: HW device data.
Annotation
- Immediate include surface: `linux/types.h`, `linux/slab.h`, `qed.h`.
- Detected declarations: `struct igu_ctrl_reg`, `struct qed_igu_block`, `struct qed_igu_info`, `enum igu_ctrl_cmd`, `enum qed_coalescing_fsm`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.