drivers/net/ethernet/qlogic/qed/qed_iscsi.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/qed/qed_iscsi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/qlogic/qed/qed_iscsi.c- Extension
.c- Size
- 41322 bytes
- Lines
- 1416
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hasm/byteorder.hasm/param.hlinux/delay.hlinux/dma-mapping.hlinux/etherdevice.hlinux/interrupt.hlinux/kernel.hlinux/log2.hlinux/module.hlinux/pci.hlinux/slab.hlinux/stddef.hlinux/string.hlinux/workqueue.hlinux/errno.hlinux/list.hlinux/spinlock.hlinux/qed/qed_iscsi_if.hqed.hqed_cxt.hqed_dev_api.hqed_hsi.hqed_hw.hqed_int.hqed_iro_hsi.hqed_iscsi.hqed_ll2.hqed_mcp.hqed_sp.hqed_sriov.hqed_reg_addr.h
Detected Declarations
struct qed_iscsi_connstruct qed_hash_iscsi_confunction qed_iscsi_async_eventfunction qed_sp_iscsi_func_startfunction qed_sp_iscsi_conn_offloadfunction qed_sp_iscsi_conn_updatefunction qed_sp_iscsi_mac_updatefunction qed_sp_iscsi_conn_terminatefunction qed_sp_iscsi_conn_clear_sqfunction qed_sp_iscsi_func_stopfunction qed_iscsi_setup_connectionfunction qed_iscsi_allocate_connectionfunction qed_iscsi_acquire_connectionfunction qed_iscsi_release_connectionfunction qed_iscsi_free_connectionfunction qed_iscsi_allocfunction qed_iscsi_setupfunction qed_iscsi_freefunction _qed_iscsi_get_tstatsfunction _qed_iscsi_get_mstatsfunction _qed_iscsi_get_ustatsfunction _qed_iscsi_get_xstatsfunction _qed_iscsi_get_ystatsfunction _qed_iscsi_get_pstatsfunction qed_iscsi_get_statsfunction qed_fill_iscsi_dev_infofunction qed_register_iscsi_opsfunction hash_for_each_possiblefunction qed_iscsi_stopfunction qed_iscsi_startfunction qed_iscsi_acquire_connfunction qed_iscsi_release_connfunction qed_iscsi_offload_connfunction qed_iscsi_update_connfunction qed_iscsi_clear_conn_sqfunction qed_iscsi_destroy_connfunction qed_iscsi_stats_contextfunction qed_iscsi_statsfunction qed_iscsi_change_macfunction qed_get_protocol_stats_iscsifunction qed_put_iscsi_opsexport qed_get_iscsi_opsexport qed_put_iscsi_ops
Annotated Snippet
struct qed_iscsi_conn {
struct list_head list_entry;
bool free_on_delete;
u16 conn_id;
u32 icid;
u32 fw_cid;
u8 layer_code;
u8 offl_flags;
u8 connect_mode;
u32 initial_ack;
dma_addr_t sq_pbl_addr;
struct qed_chain r2tq;
struct qed_chain xhq;
struct qed_chain uhq;
struct tcp_upload_params *tcp_upload_params_virt_addr;
dma_addr_t tcp_upload_params_phys_addr;
struct scsi_terminate_extra_params *queue_cnts_virt_addr;
dma_addr_t queue_cnts_phys_addr;
dma_addr_t syn_phy_addr;
u16 syn_ip_payload_length;
u8 local_mac[6];
u8 remote_mac[6];
u16 vlan_id;
u16 tcp_flags;
u8 ip_version;
u32 remote_ip[4];
u32 local_ip[4];
u8 ka_max_probe_cnt;
u8 dup_ack_theshold;
u32 rcv_next;
u32 snd_una;
u32 snd_next;
u32 snd_max;
u32 snd_wnd;
u32 rcv_wnd;
u32 snd_wl1;
u32 cwnd;
u32 ss_thresh;
u16 srtt;
u16 rtt_var;
u32 ts_recent;
u32 ts_recent_age;
u32 total_rt;
u32 ka_timeout_delta;
u32 rt_timeout_delta;
u8 dup_ack_cnt;
u8 snd_wnd_probe_cnt;
u8 ka_probe_cnt;
u8 rt_cnt;
u32 flow_label;
u32 ka_timeout;
u32 ka_interval;
u32 max_rt_time;
u32 initial_rcv_wnd;
u8 ttl;
u8 tos_or_tc;
u16 remote_port;
u16 local_port;
u16 mss;
u8 snd_wnd_scale;
u8 rcv_wnd_scale;
u16 da_timeout_value;
u8 ack_frequency;
u8 update_flag;
u8 default_cq;
u32 max_seq_size;
u32 max_recv_pdu_length;
u32 max_send_pdu_length;
u32 first_seq_length;
u32 exp_stat_sn;
u32 stat_sn;
u16 physical_q0;
u16 physical_q1;
u8 abortive_dsconnect;
};
static int qed_iscsi_async_event(struct qed_hwfn *p_hwfn, u8 fw_event_code,
__le16 echo, union event_ring_data *data,
u8 fw_return_code)
{
if (p_hwfn->p_iscsi_info->event_cb) {
struct qed_iscsi_info *p_iscsi = p_hwfn->p_iscsi_info;
return p_iscsi->event_cb(p_iscsi->event_context,
fw_event_code, data);
Annotation
- Immediate include surface: `linux/types.h`, `asm/byteorder.h`, `asm/param.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/etherdevice.h`, `linux/interrupt.h`, `linux/kernel.h`.
- Detected declarations: `struct qed_iscsi_conn`, `struct qed_hash_iscsi_con`, `function qed_iscsi_async_event`, `function qed_sp_iscsi_func_start`, `function qed_sp_iscsi_conn_offload`, `function qed_sp_iscsi_conn_update`, `function qed_sp_iscsi_mac_update`, `function qed_sp_iscsi_conn_terminate`, `function qed_sp_iscsi_conn_clear_sq`, `function qed_sp_iscsi_func_stop`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.