drivers/net/ethernet/qlogic/qed/qed_iwarp.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/qed/qed_iwarp.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/qlogic/qed/qed_iwarp.c- Extension
.c- Size
- 92668 bytes
- Lines
- 3261
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/if_ether.hlinux/if_vlan.hlinux/ip.hlinux/ipv6.hlinux/spinlock.hlinux/tcp.hqed_cxt.hqed_hw.hqed_ll2.hqed_rdma.hqed_reg_addr.hqed_sp.hqed_ooo.h
Detected Declarations
struct mpa_v2_hdrenum qed_iwarp_mpa_pkt_typefunction qed_iwarp_init_devinfofunction qed_iwarp_init_hwfunction qed_iwarp_cid_cleanedfunction qed_iwarp_init_fw_ramrodfunction qed_iwarp_alloc_cidfunction qed_iwarp_set_tcp_cidfunction qed_iwarp_alloc_tcp_cidfunction qed_iwarp_create_qpfunction qed_iwarp_modify_fwfunction qed_roce2iwarp_statefunction qed_iwarp2roce_statefunction qed_iwarp_modify_qpfunction qed_iwarp_fw_destroyfunction qed_iwarp_destroy_epfunction qed_iwarp_destroy_qpfunction qed_iwarp_create_epfunction qed_iwarp_print_tcp_ramrodfunction qed_iwarp_tcp_offloadfunction qed_iwarp_mpa_receivedfunction qed_iwarp_mpa_offloadfunction qed_iwarp_return_epfunction qed_iwarp_parse_private_datafunction qed_iwarp_mpa_reply_arrivedfunction qed_iwarp_mpa_completefunction qed_iwarp_mpa_v2_set_privatefunction qed_iwarp_connectfunction progressfunction qed_iwarp_wait_for_all_cidsfunction qed_iwarp_free_prealloc_epfunction qed_iwarp_prealloc_epfunction qed_iwarp_allocfunction qed_iwarp_resc_freefunction qed_iwarp_acceptfunction qed_iwarp_rejectfunction qed_iwarp_print_cm_infofunction qed_iwarp_ll2_post_rxfunction qed_iwarp_ep_existsfunction list_for_each_entryfunction qed_iwarp_get_listenerfunction list_for_each_entryfunction qed_iwarp_parse_rx_pktfunction qed_iwarp_mpa_classifyfunction qed_iwarp_init_fpdufunction qed_iwarp_cp_pktfunction qed_iwarp_update_fpdu_lengthfunction qed_iwarp_recycle_pkt
Annotated Snippet
struct mpa_v2_hdr {
__be16 ird;
__be16 ord;
};
#define MPA_V2_PEER2PEER_MODEL 0x8000
#define MPA_V2_SEND_RTR 0x4000 /* on ird */
#define MPA_V2_READ_RTR 0x4000 /* on ord */
#define MPA_V2_WRITE_RTR 0x8000
#define MPA_V2_IRD_ORD_MASK 0x3FFF
#define MPA_REV2(_mpa_rev) ((_mpa_rev) == MPA_NEGOTIATION_TYPE_ENHANCED)
#define QED_IWARP_INVALID_TCP_CID 0xffffffff
#define QED_IWARP_RCV_WND_SIZE_DEF_BB_2P (200 * 1024)
#define QED_IWARP_RCV_WND_SIZE_DEF_BB_4P (100 * 1024)
#define QED_IWARP_RCV_WND_SIZE_DEF_AH_2P (150 * 1024)
#define QED_IWARP_RCV_WND_SIZE_DEF_AH_4P (90 * 1024)
#define QED_IWARP_RCV_WND_SIZE_MIN (0xffff)
#define TIMESTAMP_HEADER_SIZE (12)
#define QED_IWARP_MAX_FIN_RT_DEFAULT (2)
#define QED_IWARP_TS_EN BIT(0)
#define QED_IWARP_DA_EN BIT(1)
#define QED_IWARP_PARAM_CRC_NEEDED (1)
#define QED_IWARP_PARAM_P2P (1)
#define QED_IWARP_DEF_MAX_RT_TIME (0)
#define QED_IWARP_DEF_CWND_FACTOR (4)
#define QED_IWARP_DEF_KA_MAX_PROBE_CNT (5)
#define QED_IWARP_DEF_KA_TIMEOUT (1200000) /* 20 min */
#define QED_IWARP_DEF_KA_INTERVAL (1000) /* 1 sec */
static int qed_iwarp_async_event(struct qed_hwfn *p_hwfn, u8 fw_event_code,
__le16 echo, union event_ring_data *data,
u8 fw_return_code);
/* Override devinfo with iWARP specific values */
void qed_iwarp_init_devinfo(struct qed_hwfn *p_hwfn)
{
struct qed_rdma_device *dev = p_hwfn->p_rdma_info->dev;
dev->max_inline = IWARP_REQ_MAX_INLINE_DATA_SIZE;
dev->max_qp = min_t(u32,
IWARP_MAX_QPS,
p_hwfn->p_rdma_info->num_qps) -
QED_IWARP_PREALLOC_CNT;
dev->max_cq = dev->max_qp;
dev->max_qp_resp_rd_atomic_resc = QED_IWARP_IRD_DEFAULT;
dev->max_qp_req_rd_atomic_resc = QED_IWARP_ORD_DEFAULT;
}
void qed_iwarp_init_hw(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
{
p_hwfn->rdma_prs_search_reg = PRS_REG_SEARCH_TCP;
qed_wr(p_hwfn, p_ptt, p_hwfn->rdma_prs_search_reg, 1);
p_hwfn->b_rdma_enabled_in_prs = true;
}
/* We have two cid maps, one for tcp which should be used only from passive
* syn processing and replacing a pre-allocated ep in the list. The second
* for active tcp and for QPs.
*/
static void qed_iwarp_cid_cleaned(struct qed_hwfn *p_hwfn, u32 cid)
{
cid -= qed_cxt_get_proto_cid_start(p_hwfn, p_hwfn->p_rdma_info->proto);
spin_lock_bh(&p_hwfn->p_rdma_info->lock);
if (cid < QED_IWARP_PREALLOC_CNT)
qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->tcp_cid_map,
cid);
else
qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->cid_map, cid);
spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
}
void
qed_iwarp_init_fw_ramrod(struct qed_hwfn *p_hwfn,
struct iwarp_init_func_ramrod_data *p_ramrod)
{
p_ramrod->iwarp.ll2_ooo_q_index =
RESC_START(p_hwfn, QED_LL2_RAM_QUEUE) +
p_hwfn->p_rdma_info->iwarp.ll2_ooo_handle;
Annotation
- Immediate include surface: `linux/if_ether.h`, `linux/if_vlan.h`, `linux/ip.h`, `linux/ipv6.h`, `linux/spinlock.h`, `linux/tcp.h`, `qed_cxt.h`, `qed_hw.h`.
- Detected declarations: `struct mpa_v2_hdr`, `enum qed_iwarp_mpa_pkt_type`, `function qed_iwarp_init_devinfo`, `function qed_iwarp_init_hw`, `function qed_iwarp_cid_cleaned`, `function qed_iwarp_init_fw_ramrod`, `function qed_iwarp_alloc_cid`, `function qed_iwarp_set_tcp_cid`, `function qed_iwarp_alloc_tcp_cid`, `function qed_iwarp_create_qp`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.