drivers/net/ethernet/qlogic/qed/qed_mfw_hsi.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/qed/qed_mfw_hsi.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/qlogic/qed/qed_mfw_hsi.h- Extension
.h- Size
- 76561 bytes
- Lines
- 2476
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct mcp_tracestruct eth_phy_cfgstruct port_mf_cfgstruct eth_statsstruct pkt_type_cntstruct brb_statsstruct port_statsstruct couple_mode_teamingstruct lldp_config_params_sstruct lldp_status_params_sstruct dcbx_ets_featurestruct dcbx_app_priority_entrystruct dcbx_app_priority_featurestruct dcbx_featuresstruct dcbx_local_paramsstruct dcbx_mibstruct lldp_system_tlvs_buffer_sstruct lldp_received_tlvs_sstruct dcb_dscp_mapstruct mcp_val64struct generic_idc_msg_sstruct pcie_stats_stcstruct public_globalstruct fw_flr_mbstruct public_pathstruct dci_npiv_settingsstruct dci_fc_npiv_cfgstruct dci_fc_npiv_tblstruct pause_flood_monitorstruct public_portstruct drv_version_stcstruct public_funcstruct mcp_macstruct mcp_file_attstruct bist_nvm_image_attstruct lan_stats_stcstruct fcoe_stats_stcstruct iscsi_stats_stcstruct rdma_stats_stcstruct ocbb_data_stcstruct fcoe_cap_stcstruct temperature_status_stcstruct mdump_config_stcstruct resource_infostruct mcp_wwnstruct load_req_stcstruct load_rsp_stcstruct mdump_retain_data_stc
Annotated Snippet
struct mcp_trace {
u32 signature; /* Help to identify that the trace is valid */
u32 size; /* the size of the trace buffer in bytes */
u32 curr_level; /* 2 - all will be written to the buffer
* 1 - debug trace will not be written
* 0 - just errors will be written to the buffer
*/
u32 modules_mask[2]; /* a bit per module, 1 means write it, 0 means
* mask it.
*/
/* Warning: the following pointers are assumed to be 32bits as they are
* used only in the MFW.
*/
u32 trace_prod; /* The next trace will be written to this offset */
u32 trace_oldest; /* The oldest valid trace starts at this offset
* (usually very close after the current producer).
*/
};
#define VF_MAX_STATIC 192
#define VF_BITMAP_SIZE_IN_DWORDS (VF_MAX_STATIC / 32)
#define VF_BITMAP_SIZE_IN_BYTES (VF_BITMAP_SIZE_IN_DWORDS * sizeof(u32))
#define EXT_VF_MAX_STATIC 240
#define EXT_VF_BITMAP_SIZE_IN_DWORDS (((EXT_VF_MAX_STATIC - 1) / 32) + 1)
#define EXT_VF_BITMAP_SIZE_IN_BYTES (EXT_VF_BITMAP_SIZE_IN_DWORDS * sizeof(u32))
#define ADDED_VF_BITMAP_SIZE 2
#define MCP_GLOB_PATH_MAX 2
#define MCP_PORT_MAX 2
#define MCP_GLOB_PORT_MAX 4
#define MCP_GLOB_FUNC_MAX 16
typedef u32 offsize_t; /* In DWORDS !!! */
/* Offset from the beginning of the MCP scratchpad */
#define OFFSIZE_OFFSET_SHIFT 0
#define OFFSIZE_OFFSET_MASK 0x0000ffff
/* Size of specific element (not the whole array if any) */
#define OFFSIZE_SIZE_SHIFT 16
#define OFFSIZE_SIZE_MASK 0xffff0000
#define SECTION_OFFSET(_offsize) (((((_offsize) & \
OFFSIZE_OFFSET_MASK) >> \
OFFSIZE_OFFSET_SHIFT) << 2))
#define QED_SECTION_SIZE(_offsize) ((((_offsize) & \
OFFSIZE_SIZE_MASK) >> \
OFFSIZE_SIZE_SHIFT) << 2)
#define SECTION_ADDR(_offsize, idx) (MCP_REG_SCRATCH + \
SECTION_OFFSET((_offsize)) + \
(QED_SECTION_SIZE((_offsize)) * (idx)))
#define SECTION_OFFSIZE_ADDR(_pub_base, _section) \
((_pub_base) + offsetof(struct mcp_public_data, sections[_section]))
/* PHY configuration */
struct eth_phy_cfg {
u32 speed;
#define ETH_SPEED_AUTONEG 0x0
#define ETH_SPEED_SMARTLINQ 0x8
u32 pause;
#define ETH_PAUSE_NONE 0x0
#define ETH_PAUSE_AUTONEG 0x1
#define ETH_PAUSE_RX 0x2
#define ETH_PAUSE_TX 0x4
u32 adv_speed;
u32 loopback_mode;
#define ETH_LOOPBACK_NONE 0x0
#define ETH_LOOPBACK_INT_PHY 0x1
#define ETH_LOOPBACK_EXT_PHY 0x2
#define ETH_LOOPBACK_EXT 0x3
#define ETH_LOOPBACK_MAC 0x4
#define ETH_LOOPBACK_CNIG_AH_ONLY_0123 0x5
#define ETH_LOOPBACK_CNIG_AH_ONLY_2301 0x6
#define ETH_LOOPBACK_PCS_AH_ONLY 0x7
#define ETH_LOOPBACK_REVERSE_MAC_AH_ONLY 0x8
#define ETH_LOOPBACK_INT_PHY_FEA_AH_ONLY 0x9
u32 eee_cfg;
#define EEE_CFG_EEE_ENABLED BIT(0)
#define EEE_CFG_TX_LPI BIT(1)
#define EEE_CFG_ADV_SPEED_1G BIT(2)
#define EEE_CFG_ADV_SPEED_10G BIT(3)
#define EEE_TX_TIMER_USEC_MASK 0xfffffff0
#define EEE_TX_TIMER_USEC_OFFSET 4
Annotation
- Detected declarations: `struct mcp_trace`, `struct eth_phy_cfg`, `struct port_mf_cfg`, `struct eth_stats`, `struct pkt_type_cnt`, `struct brb_stats`, `struct port_stats`, `struct couple_mode_teaming`, `struct lldp_config_params_s`, `struct lldp_status_params_s`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.