drivers/net/ethernet/qlogic/qla3xxx.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/qla3xxx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/qlogic/qla3xxx.c- Extension
.c- Size
- 103324 bytes
- Lines
- 3930
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/types.hlinux/module.hlinux/list.hlinux/pci.hlinux/dma-mapping.hlinux/sched.hlinux/slab.hlinux/dmapool.hlinux/mempool.hlinux/spinlock.hlinux/kthread.hlinux/interrupt.hlinux/errno.hlinux/ioport.hlinux/ip.hlinux/in.hlinux/if_arp.hlinux/if_ether.hlinux/netdevice.hlinux/etherdevice.hlinux/ethtool.hlinux/skbuff.hlinux/rtnetlink.hlinux/if_vlan.hlinux/delay.hlinux/mm.hlinux/prefetch.hqla3xxx.h
Detected Declarations
struct PHY_DEVICE_INFOenum PHY_DEVICE_TYPEfunction ql_sem_spinlockfunction ql_sem_unlockfunction ql_sem_lockfunction ql_wait_for_drvr_lockfunction ql_set_register_pagefunction ql_read_common_reg_lfunction ql_read_common_regfunction ql_read_page0_reg_lfunction ql_read_page0_regfunction ql_write_common_reg_lfunction ql_write_common_regfunction ql_write_nvram_regfunction ql_write_page0_regfunction ql_write_page1_regfunction ql_write_page2_regfunction ql_disable_interruptsfunction ql_enable_interruptsfunction ql_release_to_lrg_buf_free_listfunction fm93c56a_selectfunction fm93c56a_cmdfunction fm93c56a_deselectfunction fm93c56a_datainfunction eeprom_readwordfunction ql_set_mac_addrfunction ql_get_nvram_paramsfunction ql_wait_for_mii_readyfunction ql_mii_enable_scan_modefunction ql_mii_disable_scan_modefunction ql_mii_write_reg_exfunction ql_mii_read_reg_exfunction ql_mii_write_regfunction ql_mii_read_regfunction ql_petbi_resetfunction ql_petbi_start_negfunction ql_petbi_reset_exfunction ql_petbi_start_neg_exfunction ql_petbi_initfunction ql_petbi_init_exfunction ql_is_petbi_neg_pausefunction phyAgereSpecificInitfunction getPhyTypefunction ql_phy_get_speedfunction ql_is_full_dupfunction ql_is_phy_neg_pausefunction PHY_Setupfunction ql_mac_enable
Annotated Snippet
static const struct net_device_ops ql3xxx_netdev_ops = {
.ndo_open = ql3xxx_open,
.ndo_start_xmit = ql3xxx_send,
.ndo_stop = ql3xxx_close,
.ndo_validate_addr = eth_validate_addr,
.ndo_set_mac_address = ql3xxx_set_mac_address,
.ndo_tx_timeout = ql3xxx_tx_timeout,
};
static int ql3xxx_probe(struct pci_dev *pdev,
const struct pci_device_id *pci_entry)
{
struct net_device *ndev = NULL;
struct ql3_adapter *qdev = NULL;
static int cards_found;
int err;
err = pci_enable_device(pdev);
if (err) {
pr_err("%s cannot enable PCI device\n", pci_name(pdev));
goto err_out;
}
err = pci_request_regions(pdev, DRV_NAME);
if (err) {
pr_err("%s cannot obtain PCI resources\n", pci_name(pdev));
goto err_out_disable_pdev;
}
pci_set_master(pdev);
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
if (err) {
pr_err("%s no usable DMA configuration\n", pci_name(pdev));
goto err_out_free_regions;
}
ndev = alloc_etherdev(sizeof(struct ql3_adapter));
if (!ndev) {
err = -ENOMEM;
goto err_out_free_regions;
}
SET_NETDEV_DEV(ndev, &pdev->dev);
pci_set_drvdata(pdev, ndev);
qdev = netdev_priv(ndev);
qdev->index = cards_found;
qdev->ndev = ndev;
qdev->pdev = pdev;
qdev->device_id = pci_entry->device;
qdev->port_link_state = LS_DOWN;
if (msi)
qdev->msi = 1;
qdev->msg_enable = netif_msg_init(debug, default_msg);
ndev->features |= NETIF_F_HIGHDMA;
if (qdev->device_id == QL3032_DEVICE_ID)
ndev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
qdev->mem_map_registers = pci_ioremap_bar(pdev, 1);
if (!qdev->mem_map_registers) {
pr_err("%s: cannot map device registers\n", pci_name(pdev));
err = -EIO;
goto err_out_free_ndev;
}
spin_lock_init(&qdev->adapter_lock);
spin_lock_init(&qdev->hw_lock);
/* Set driver entry points */
ndev->netdev_ops = &ql3xxx_netdev_ops;
ndev->ethtool_ops = &ql3xxx_ethtool_ops;
ndev->watchdog_timeo = 5 * HZ;
netif_napi_add(ndev, &qdev->napi, ql_poll);
ndev->irq = pdev->irq;
/* make sure the EEPROM is good */
if (ql_get_nvram_params(qdev)) {
pr_alert("%s: Adapter #%d, Invalid NVRAM parameters\n",
__func__, qdev->index);
err = -EIO;
goto err_out_iounmap;
}
ql_set_mac_info(qdev);
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/types.h`, `linux/module.h`, `linux/list.h`, `linux/pci.h`, `linux/dma-mapping.h`, `linux/sched.h`, `linux/slab.h`.
- Detected declarations: `struct PHY_DEVICE_INFO`, `enum PHY_DEVICE_TYPE`, `function ql_sem_spinlock`, `function ql_sem_unlock`, `function ql_sem_lock`, `function ql_wait_for_drvr_lock`, `function ql_set_register_page`, `function ql_read_common_reg_l`, `function ql_read_common_reg`, `function ql_read_page0_reg_l`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.