drivers/net/ethernet/qlogic/qla3xxx.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/qla3xxx.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/qlogic/qla3xxx.h- Extension
.h- Size
- 31152 bytes
- Lines
- 1189
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct ob_mac_iocb_reqstruct ob_mac_iocb_rspstruct ib_mac_iocb_rspstruct ob_ip_iocb_reqstruct ob_ip_iocb_rspstruct ib_ip_iocb_rspstruct net_rsp_iocbstruct ql3xxx_common_registersstruct ql3xxx_port_registersstruct ql3xxx_host_memory_registersstruct ql3xxx_local_ram_registersstruct eeprom_port_cfgstruct eeprom_bios_cfgstruct eeprom_function_cfgstruct eeprom_datastruct lrg_buf_q_entrystruct bufq_addr_elementstruct ql_rcv_buf_cbstruct oal_entrystruct oalstruct map_liststruct ql_tx_buf_cbstruct ql3_adapterenum link_state_t
Annotated Snippet
struct ob_mac_iocb_req {
u8 opcode;
u8 flags;
#define OB_MAC_IOCB_REQ_MA 0xe0
#define OB_MAC_IOCB_REQ_F 0x10
#define OB_MAC_IOCB_REQ_X 0x08
#define OB_MAC_IOCB_REQ_D 0x02
#define OB_MAC_IOCB_REQ_I 0x01
u8 flags1;
#define OB_3032MAC_IOCB_REQ_IC 0x04
#define OB_3032MAC_IOCB_REQ_TC 0x02
#define OB_3032MAC_IOCB_REQ_UC 0x01
u8 reserved0;
u32 transaction_id; /* opaque for hardware */
__le16 data_len;
u8 ip_hdr_off;
u8 ip_hdr_len;
__le32 reserved1;
__le32 reserved2;
__le32 buf_addr0_low;
__le32 buf_addr0_high;
__le32 buf_0_len;
__le32 buf_addr1_low;
__le32 buf_addr1_high;
__le32 buf_1_len;
__le32 buf_addr2_low;
__le32 buf_addr2_high;
__le32 buf_2_len;
__le32 reserved3;
__le32 reserved4;
};
/*
* The following constants define control bits for buffer
* length fields for all IOCB's.
*/
#define OB_MAC_IOCB_REQ_E 0x80000000 /* Last valid buffer in list. */
#define OB_MAC_IOCB_REQ_C 0x40000000 /* points to an OAL. (continuation) */
#define OB_MAC_IOCB_REQ_L 0x20000000 /* Auburn local address pointer. */
#define OB_MAC_IOCB_REQ_R 0x10000000 /* 32-bit address pointer. */
struct ob_mac_iocb_rsp {
u8 opcode;
u8 flags;
#define OB_MAC_IOCB_RSP_P 0x08
#define OB_MAC_IOCB_RSP_L 0x04
#define OB_MAC_IOCB_RSP_S 0x02
#define OB_MAC_IOCB_RSP_I 0x01
__le16 reserved0;
u32 transaction_id; /* opaque for hardware */
__le32 reserved1;
__le32 reserved2;
};
struct ib_mac_iocb_rsp {
u8 opcode;
#define IB_MAC_IOCB_RSP_V 0x80
u8 flags;
#define IB_MAC_IOCB_RSP_S 0x80
#define IB_MAC_IOCB_RSP_H1 0x40
#define IB_MAC_IOCB_RSP_H0 0x20
#define IB_MAC_IOCB_RSP_B 0x10
#define IB_MAC_IOCB_RSP_M 0x08
#define IB_MAC_IOCB_RSP_MA 0x07
__le16 length;
__le32 reserved;
__le32 ial_low;
__le32 ial_high;
};
struct ob_ip_iocb_req {
u8 opcode;
__le16 flags;
#define OB_IP_IOCB_REQ_O 0x100
#define OB_IP_IOCB_REQ_H 0x008
#define OB_IP_IOCB_REQ_U 0x004
#define OB_IP_IOCB_REQ_D 0x002
#define OB_IP_IOCB_REQ_I 0x001
u8 reserved0;
__le32 transaction_id;
__le16 data_len;
__le16 reserved1;
__le32 hncb_ptr_low;
__le32 hncb_ptr_high;
__le32 buf_addr0_low;
Annotation
- Detected declarations: `struct ob_mac_iocb_req`, `struct ob_mac_iocb_rsp`, `struct ib_mac_iocb_rsp`, `struct ob_ip_iocb_req`, `struct ob_ip_iocb_rsp`, `struct ib_ip_iocb_rsp`, `struct net_rsp_iocb`, `struct ql3xxx_common_registers`, `struct ql3xxx_port_registers`, `struct ql3xxx_host_memory_registers`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.