drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h
Extension
.h
Size
22053 bytes
Lines
657
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct qlcnic_sds_mbx {
	u32	phy_addr_low;
	u32	phy_addr_high;
	u32	rsvd1[4];
#if defined(__LITTLE_ENDIAN)
	u16	sds_ring_size;
	u16	rsvd2;
	u16	rsvd3[2];
	u16	intrpt_id;
	u8	intrpt_val;
	u8	rsvd4;
#elif defined(__BIG_ENDIAN)
	u16	rsvd2;
	u16	sds_ring_size;
	u16	rsvd3[2];
	u8	rsvd4;
	u8	intrpt_val;
	u16	intrpt_id;
#endif
	u32	rsvd5;
} __packed;

/* receive descriptor buffer data
 * phy_addr_reg_{low|high}: physical address of regular buffer
 * phy_addr_jmb_{low|high}: physical address of jumbo buffer
 * reg_ring_sz: size of regular buffer
 * reg_ring_len: no. of entries in regular buffer
 * jmb_ring_len: no. of entries in jumbo buffer
 * jmb_ring_sz: size of jumbo buffer
 */
struct qlcnic_rds_mbx {
	u32	phy_addr_reg_low;
	u32	phy_addr_reg_high;
	u32	phy_addr_jmb_low;
	u32	phy_addr_jmb_high;
#if defined(__LITTLE_ENDIAN)
	u16	reg_ring_sz;
	u16	reg_ring_len;
	u16	jmb_ring_sz;
	u16	jmb_ring_len;
#elif defined(__BIG_ENDIAN)
	u16	reg_ring_len;
	u16	reg_ring_sz;
	u16	jmb_ring_len;
	u16	jmb_ring_sz;
#endif
} __packed;

/* host producers for regular and jumbo rings */
struct __host_producer_mbx {
	u32	reg_buf;
	u32	jmb_buf;
} __packed;

/* Receive context mailbox data outbox registers
 * @state: state of the context
 * @vport_id: virtual port id
 * @context_id: receive context id
 * @num_pci_func: number of pci functions of the port
 * @phy_port: physical port id
 */
struct qlcnic_rcv_mbx_out {
#if defined(__LITTLE_ENDIAN)
	u8	rcv_num;
	u8	sts_num;
	u16	ctx_id;
	u8	state;
	u8	num_pci_func;
	u8	phy_port;
	u8	vport_id;
#elif defined(__BIG_ENDIAN)
	u16	ctx_id;
	u8	sts_num;
	u8	rcv_num;
	u8	vport_id;
	u8	phy_port;
	u8	num_pci_func;
	u8	state;
#endif
	u32	host_csmr[QLCNIC_MAX_SDS_RINGS];
	struct __host_producer_mbx host_prod[QLCNIC_MAX_SDS_RINGS];
} __packed;

struct qlcnic_add_rings_mbx_out {
#if defined(__LITTLE_ENDIAN)
	u8      rcv_num;
	u8      sts_num;
	u16	ctx_id;
#elif defined(__BIG_ENDIAN)
	u16	ctx_id;

Annotation

Implementation Notes