drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c- Extension
.c- Size
- 28396 bytes
- Lines
- 1147
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hqlcnic.h
Detected Declarations
struct qlcnic_dcb_capabilitystruct qlcnic_dcb_paramstruct qlcnic_dcb_mbx_paramsstruct qlcnic_82xx_dcb_param_mbx_lestruct qlcnic_dcb_prio_cfgstruct qlcnic_dcb_pg_cfgstruct qlcnic_dcb_tc_cfgstruct qlcnic_dcb_appstruct qlcnic_dcb_ceestruct qlcnic_dcb_cfgenum qlcnic_dcb_selectorenum qlcnic_dcb_prio_typeenum qlcnic_dcb_pfc_typefunction qlcnic_dcb_get_num_appfunction qlcnic_dcb_pfc_hdr_validfunction qlcnic_dcb_tsa_hdr_validfunction qlcnic_dcb_get_prio_map_appfunction qlcnic_dcb_prio_countfunction __qlcnic_init_dcbnl_opsfunction qlcnic_set_dcb_opsfunction qlcnic_register_dcbfunction __qlcnic_dcb_freefunction __qlcnic_dcb_get_infofunction __qlcnic_dcb_attachfunction __qlcnic_dcb_query_hw_capabilityfunction __qlcnic_dcb_get_capabilityfunction qlcnic_82xx_dcb_get_hw_capabilityfunction qlcnic_82xx_dcb_query_cee_paramfunction qlcnic_82xx_dcb_get_cee_cfgfunction qlcnic_dcb_aen_workfunction qlcnic_82xx_dcb_aen_handlerfunction qlcnic_83xx_dcb_get_hw_capabilityfunction qlcnic_83xx_dcb_query_cee_paramfunction qlcnic_83xx_dcb_get_cee_cfgfunction qlcnic_83xx_dcb_aen_handlerfunction qlcnic_dcb_fill_cee_tc_paramsfunction qlcnic_dcb_fill_cee_pg_paramsfunction qlcnic_dcb_fill_cee_app_paramsfunction qlcnic_dcb_map_cee_paramsfunction qlcnic_dcb_data_cee_param_mapfunction qlcnic_dcb_get_statefunction qlcnic_dcb_get_perm_hw_addrfunction qlcnic_dcb_get_pg_tc_cfg_txfunction qlcnic_dcb_get_pg_bwg_cfg_txfunction qlcnic_dcb_get_pfc_cfgfunction qlcnic_dcb_get_capabilityfunction qlcnic_dcb_get_num_tcsfunction qlcnic_dcb_get_app
Annotated Snippet
struct qlcnic_dcb_capability {
bool tsa_capability;
bool ets_capability;
u8 max_num_tc;
u8 max_ets_tc;
u8 max_pfc_tc;
u8 dcb_capability;
};
struct qlcnic_dcb_param {
u32 hdr_prio_pfc_map[2];
u32 prio_pg_map[2];
u32 pg_bw_map[2];
u32 pg_tsa_map[2];
u32 app[QLC_DCB_MAX_APP];
};
struct qlcnic_dcb_mbx_params {
/* 1st local, 2nd operational 3rd remote */
struct qlcnic_dcb_param type[3];
u32 prio_tc_map;
};
struct qlcnic_82xx_dcb_param_mbx_le {
__le32 hdr_prio_pfc_map[2];
__le32 prio_pg_map[2];
__le32 pg_bw_map[2];
__le32 pg_tsa_map[2];
__le32 app[QLC_DCB_MAX_APP];
};
enum qlcnic_dcb_selector {
QLC_SELECTOR_DEF = 0x0,
QLC_SELECTOR_ETHER,
QLC_SELECTOR_TCP,
QLC_SELECTOR_UDP,
};
enum qlcnic_dcb_prio_type {
QLC_PRIO_NONE = 0,
QLC_PRIO_GROUP,
QLC_PRIO_LINK,
};
enum qlcnic_dcb_pfc_type {
QLC_PFC_DISABLED = 0,
QLC_PFC_FULL,
QLC_PFC_TX,
QLC_PFC_RX
};
struct qlcnic_dcb_prio_cfg {
bool valid;
enum qlcnic_dcb_pfc_type pfc_type;
};
struct qlcnic_dcb_pg_cfg {
bool valid;
u8 total_bw_percent; /* of Link/ port BW */
u8 prio_count;
u8 tsa_type;
};
struct qlcnic_dcb_tc_cfg {
bool valid;
struct qlcnic_dcb_prio_cfg prio_cfg[QLC_DCB_MAX_PRIO];
enum qlcnic_dcb_prio_type prio_type; /* always prio_link */
u8 link_percent; /* % of link bandwidth */
u8 bwg_percent; /* % of BWG's bandwidth */
u8 up_tc_map;
u8 pgid;
};
struct qlcnic_dcb_app {
bool valid;
enum qlcnic_dcb_selector selector;
u16 protocol;
u8 priority;
};
struct qlcnic_dcb_cee {
struct qlcnic_dcb_tc_cfg tc_cfg[QLC_DCB_MAX_TC];
struct qlcnic_dcb_pg_cfg pg_cfg[QLC_DCB_MAX_PG];
struct qlcnic_dcb_app app[QLC_DCB_MAX_APP];
bool tc_param_valid;
bool pfc_mode_enable;
};
struct qlcnic_dcb_cfg {
/* 0 - local, 1 - operational, 2 - remote */
Annotation
- Immediate include surface: `linux/types.h`, `qlcnic.h`.
- Detected declarations: `struct qlcnic_dcb_capability`, `struct qlcnic_dcb_param`, `struct qlcnic_dcb_mbx_params`, `struct qlcnic_82xx_dcb_param_mbx_le`, `struct qlcnic_dcb_prio_cfg`, `struct qlcnic_dcb_pg_cfg`, `struct qlcnic_dcb_tc_cfg`, `struct qlcnic_dcb_app`, `struct qlcnic_dcb_cee`, `struct qlcnic_dcb_cfg`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.