drivers/net/ethernet/qualcomm/ppe/ppe_config.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/qualcomm/ppe/ppe_config.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/qualcomm/ppe/ppe_config.h
Extension
.h
Size
11119 bytes
Lines
318
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ppe_scheduler_cfg {
	int flow_id;
	int pri;
	int drr_node_id;
	int drr_node_wt;
	bool unit_is_packet;
	enum ppe_scheduler_frame_mode frame_mode;
};

/**
 * enum ppe_resource_type - PPE resource type.
 * @PPE_RES_UCAST: Unicast queue resource.
 * @PPE_RES_MCAST: Multicast queue resource.
 * @PPE_RES_L0_NODE: Level 0 for queue based node resource.
 * @PPE_RES_L1_NODE: Level 1 for flow based node resource.
 * @PPE_RES_FLOW_ID: Flow based node resource.
 */
enum ppe_resource_type {
	PPE_RES_UCAST,
	PPE_RES_MCAST,
	PPE_RES_L0_NODE,
	PPE_RES_L1_NODE,
	PPE_RES_FLOW_ID,
};

/**
 * struct ppe_queue_ucast_dest - PPE unicast queue destination.
 * @src_profile: Source profile.
 * @service_code_en: Enable service code to map the queue base ID.
 * @service_code: Service code.
 * @cpu_code_en: Enable CPU code to map the queue base ID.
 * @cpu_code: CPU code.
 * @dest_port: destination port.
 *
 * PPE egress queue ID is decided by the service code if enabled, otherwise
 * by the CPU code if enabled, or by destination port if both service code
 * and CPU code are disabled.
 */
struct ppe_queue_ucast_dest {
	int src_profile;
	bool service_code_en;
	int service_code;
	bool cpu_code_en;
	int cpu_code;
	int dest_port;
};

/* Hardware bitmaps for bypassing features of the ingress packet. */
enum ppe_sc_ingress_type {
	PPE_SC_BYPASS_INGRESS_VLAN_TAG_FMT_CHECK = 0,
	PPE_SC_BYPASS_INGRESS_VLAN_MEMBER_CHECK = 1,
	PPE_SC_BYPASS_INGRESS_VLAN_TRANSLATE = 2,
	PPE_SC_BYPASS_INGRESS_MY_MAC_CHECK = 3,
	PPE_SC_BYPASS_INGRESS_DIP_LOOKUP = 4,
	PPE_SC_BYPASS_INGRESS_FLOW_LOOKUP = 5,
	PPE_SC_BYPASS_INGRESS_FLOW_ACTION = 6,
	PPE_SC_BYPASS_INGRESS_ACL = 7,
	PPE_SC_BYPASS_INGRESS_FAKE_MAC_HEADER = 8,
	PPE_SC_BYPASS_INGRESS_SERVICE_CODE = 9,
	PPE_SC_BYPASS_INGRESS_WRONG_PKT_FMT_L2 = 10,
	PPE_SC_BYPASS_INGRESS_WRONG_PKT_FMT_L3_IPV4 = 11,
	PPE_SC_BYPASS_INGRESS_WRONG_PKT_FMT_L3_IPV6 = 12,
	PPE_SC_BYPASS_INGRESS_WRONG_PKT_FMT_L4 = 13,
	PPE_SC_BYPASS_INGRESS_FLOW_SERVICE_CODE = 14,
	PPE_SC_BYPASS_INGRESS_ACL_SERVICE_CODE = 15,
	PPE_SC_BYPASS_INGRESS_FAKE_L2_PROTO = 16,
	PPE_SC_BYPASS_INGRESS_PPPOE_TERMINATION = 17,
	PPE_SC_BYPASS_INGRESS_DEFAULT_VLAN = 18,
	PPE_SC_BYPASS_INGRESS_DEFAULT_PCP = 19,
	PPE_SC_BYPASS_INGRESS_VSI_ASSIGN = 20,
	/* Values 21-23 are not specified by hardware. */
	PPE_SC_BYPASS_INGRESS_VLAN_ASSIGN_FAIL = 24,
	PPE_SC_BYPASS_INGRESS_SOURCE_GUARD = 25,
	PPE_SC_BYPASS_INGRESS_MRU_MTU_CHECK = 26,
	PPE_SC_BYPASS_INGRESS_FLOW_SRC_CHECK = 27,
	PPE_SC_BYPASS_INGRESS_FLOW_QOS = 28,
	/* This must be last as it determines the size of the BITMAP. */
	PPE_SC_BYPASS_INGRESS_SIZE,
};

/* Hardware bitmaps for bypassing features of the egress packet. */
enum ppe_sc_egress_type {
	PPE_SC_BYPASS_EGRESS_VLAN_MEMBER_CHECK = 0,
	PPE_SC_BYPASS_EGRESS_VLAN_TRANSLATE = 1,
	PPE_SC_BYPASS_EGRESS_VLAN_TAG_FMT_CTRL = 2,
	PPE_SC_BYPASS_EGRESS_FDB_LEARN = 3,
	PPE_SC_BYPASS_EGRESS_FDB_REFRESH = 4,
	PPE_SC_BYPASS_EGRESS_L2_SOURCE_SECURITY = 5,
	PPE_SC_BYPASS_EGRESS_MANAGEMENT_FWD = 6,
	PPE_SC_BYPASS_EGRESS_BRIDGING_FWD = 7,

Annotation

Implementation Notes