drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
Extension
.c
Size
7780 bytes
Lines
283
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/* 10G controller driver for Samsung SoCs
 *
 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Author: Siva Reddy Kallam <siva.kallam@samsung.com>
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/export.h>
#include <linux/io.h>
#include <linux/netdevice.h>
#include <linux/phy.h>

#include "sxgbe_common.h"
#include "sxgbe_reg.h"

/* MAC core initialization */
static void sxgbe_core_init(void __iomem *ioaddr)
{
	u32 regval;

	/* TX configuration */
	regval = readl(ioaddr + SXGBE_CORE_TX_CONFIG_REG);
	/* Other configurable parameters IFP, IPG, ISR, ISM
	 * needs to be set if needed
	 */
	regval |= SXGBE_TX_JABBER_DISABLE;
	writel(regval, ioaddr + SXGBE_CORE_TX_CONFIG_REG);

	/* RX configuration */
	regval = readl(ioaddr + SXGBE_CORE_RX_CONFIG_REG);
	/* Other configurable parameters CST, SPEN, USP, GPSLCE
	 * WD, LM, S2KP, HDSMS, GPSL, ELEN, ARPEN needs to be
	 * set if needed
	 */
	regval |= SXGBE_RX_JUMBPKT_ENABLE | SXGBE_RX_ACS_ENABLE;
	writel(regval, ioaddr + SXGBE_CORE_RX_CONFIG_REG);
}

/* Dump MAC registers */
static void sxgbe_core_dump_regs(void __iomem *ioaddr)
{
}

static int sxgbe_get_lpi_status(void __iomem *ioaddr, const u32 irq_status)
{
	int status = 0;
	int lpi_status;

	/* Reading this register shall clear all the LPI status bits */
	lpi_status = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);

	if (lpi_status & LPI_CTRL_STATUS_TLPIEN)
		status |= TX_ENTRY_LPI_MODE;
	if (lpi_status & LPI_CTRL_STATUS_TLPIEX)
		status |= TX_EXIT_LPI_MODE;
	if (lpi_status & LPI_CTRL_STATUS_RLPIEN)
		status |= RX_ENTRY_LPI_MODE;
	if (lpi_status & LPI_CTRL_STATUS_RLPIEX)
		status |= RX_EXIT_LPI_MODE;

	return status;
}

/* Handle extra events on specific interrupts hw dependent */
static int sxgbe_core_host_irq_status(void __iomem *ioaddr,
				      struct sxgbe_extra_stats *x)
{
	int irq_status, status = 0;

	irq_status = readl(ioaddr + SXGBE_CORE_INT_STATUS_REG);

	if (unlikely(irq_status & LPI_INT_STATUS))
		status |= sxgbe_get_lpi_status(ioaddr, irq_status);

	return status;
}

/* Set power management mode (e.g. magic frame) */
static void sxgbe_core_pmt(void __iomem *ioaddr, unsigned long mode)
{
}

/* Set/Get Unicast MAC addresses */
static void sxgbe_core_set_umac_addr(void __iomem *ioaddr,
				     const unsigned char *addr,
				     unsigned int reg_n)

Annotation

Implementation Notes