drivers/net/ethernet/sfc/ef100_regs.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/sfc/ef100_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/sfc/ef100_regs.h- Extension
.h- Size
- 26425 bytes
- Lines
- 731
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef EFX_EF100_REGS_H
#define EFX_EF100_REGS_H
/* EF100 hardware architecture definitions have a name prefix following
* the format:
*
* E<type>_<min-rev><max-rev>_
*
* The following <type> strings are used:
*
* MMIO register Host memory structure
* -------------------------------------------------------------
* Address R
* Bitfield RF SF
* Enumerator FE SE
*
* <min-rev> is the first revision to which the definition applies:
*
* G: Riverhead
*
* If the definition has been changed or removed in later revisions
* then <max-rev> is the last revision to which the definition applies;
* otherwise it is "Z".
*/
/**************************************************************************
*
* EF100 registers and descriptors
*
**************************************************************************
*/
/* HW_REV_ID_REG: Hardware revision info register */
#define ER_GZ_HW_REV_ID 0x00000000
/* NIC_REV_ID: SoftNIC revision info register */
#define ER_GZ_NIC_REV_ID 0x00000004
/* NIC_MAGIC: Signature register that should contain a well-known value */
#define ER_GZ_NIC_MAGIC 0x00000008
#define ERF_GZ_NIC_MAGIC_LBN 0
#define ERF_GZ_NIC_MAGIC_WIDTH 32
#define EFE_GZ_NIC_MAGIC_EXPECTED 0xEF100FCB
/* MC_SFT_STATUS: MC soft status */
#define ER_GZ_MC_SFT_STATUS 0x00000010
#define ER_GZ_MC_SFT_STATUS_STEP 4
#define ER_GZ_MC_SFT_STATUS_ROWS 2
/* MC_DB_LWRD_REG: MC doorbell register, low word */
#define ER_GZ_MC_DB_LWRD 0x00000020
/* MC_DB_HWRD_REG: MC doorbell register, high word */
#define ER_GZ_MC_DB_HWRD 0x00000024
/* EVQ_INT_PRIME: Prime EVQ */
#define ER_GZ_EVQ_INT_PRIME 0x00000040
#define ERF_GZ_IDX_LBN 16
#define ERF_GZ_IDX_WIDTH 16
#define ERF_GZ_EVQ_ID_LBN 0
#define ERF_GZ_EVQ_ID_WIDTH 16
/* INT_AGG_RING_PRIME: Prime interrupt aggregation ring. */
#define ER_GZ_INT_AGG_RING_PRIME 0x00000048
/* defined as ERF_GZ_IDX_LBN 16; access=WO reset=0x0 */
/* defined as ERF_GZ_IDX_WIDTH 16 */
#define ERF_GZ_RING_ID_LBN 0
#define ERF_GZ_RING_ID_WIDTH 16
/* EVQ_TMR: EVQ timer control */
#define ER_GZ_EVQ_TMR 0x00000104
#define ER_GZ_EVQ_TMR_STEP 65536
#define ER_GZ_EVQ_TMR_ROWS 1024
/* EVQ_UNSOL_CREDIT_GRANT_SEQ: Grant credits for unsolicited events. */
#define ER_GZ_EVQ_UNSOL_CREDIT_GRANT_SEQ 0x00000108
#define ER_GZ_EVQ_UNSOL_CREDIT_GRANT_SEQ_STEP 65536
#define ER_GZ_EVQ_UNSOL_CREDIT_GRANT_SEQ_ROWS 1024
/* EVQ_DESC_CREDIT_GRANT_SEQ: Grant credits for descriptor proxy events. */
#define ER_GZ_EVQ_DESC_CREDIT_GRANT_SEQ 0x00000110
#define ER_GZ_EVQ_DESC_CREDIT_GRANT_SEQ_STEP 65536
#define ER_GZ_EVQ_DESC_CREDIT_GRANT_SEQ_ROWS 1024
/* RX_RING_DOORBELL: Ring Rx doorbell. */
#define ER_GZ_RX_RING_DOORBELL 0x00000180
#define ER_GZ_RX_RING_DOORBELL_STEP 65536
#define ER_GZ_RX_RING_DOORBELL_ROWS 1024
#define ERF_GZ_RX_RING_PIDX_LBN 16
#define ERF_GZ_RX_RING_PIDX_WIDTH 16
Annotation
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.