drivers/net/ethernet/sfc/falcon/falcon.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/sfc/falcon/falcon.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/sfc/falcon/falcon.c- Extension
.c- Size
- 86585 bytes
- Lines
- 2904
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/delay.hlinux/pci.hlinux/module.hlinux/seq_file.hlinux/i2c.hlinux/mii.hlinux/slab.hlinux/sched/signal.hnet_driver.hbitfield.hefx.hnic.hfarch_regs.hio.hphy.hworkarounds.hselftest.hmdio_10g.h
Detected Declarations
struct falcon_nvconfig_board_v2struct falcon_nvconfig_board_v3struct falcon_nvconfigstruct falcon_mtd_partitionfunction falcon_setsdafunction falcon_setsclfunction falcon_getsdafunction falcon_getsclfunction falcon_push_irq_moderationfunction falcon_prepare_flushfunction legacyfunction falcon_legacy_interrupt_a1function dummy_rx_push_rss_configfunction falcon_b0_rx_push_rss_configfunction falcon_spi_pollfunction falcon_spi_waitfunction falcon_spi_cmdfunction falcon_spi_munge_commandfunction falcon_spi_readfunction falcon_spi_write_limitfunction falcon_spi_wait_writefunction falcon_spi_writefunction falcon_spi_slow_waitfunction falcon_spi_unlockfunction falcon_spi_erasefunction falcon_mtd_renamefunction falcon_mtd_readfunction falcon_mtd_erasefunction falcon_mtd_writefunction falcon_mtd_syncfunction falcon_mtd_probefunction falcon_setup_xauifunction falcon_reset_xauifunction falcon_ack_status_intrfunction falcon_xgxs_link_okfunction falcon_xmac_link_okfunction falcon_reconfigure_xmac_corefunction falcon_reconfigure_xgxs_corefunction falcon_xmac_link_ok_retryfunction falcon_xmac_check_faultfunction falcon_reconfigure_xmacfunction falcon_poll_xmacfunction falcon_push_multicast_hashfunction falcon_reset_macsfunction falcon_drain_tx_fifofunction falcon_deconfigure_mac_wrapperfunction falcon_reconfigure_mac_wrapperfunction falcon_stats_request
Annotated Snippet
struct falcon_nvconfig_board_v2 {
__le16 nports;
u8 port0_phy_addr;
u8 port0_phy_type;
u8 port1_phy_addr;
u8 port1_phy_type;
__le16 asic_sub_revision;
__le16 board_revision;
} __packed;
/* Board configuration v3 extra information */
struct falcon_nvconfig_board_v3 {
__le32 spi_device_type[2];
} __packed;
/* Bit numbers for spi_device_type */
#define SPI_DEV_TYPE_SIZE_LBN 0
#define SPI_DEV_TYPE_SIZE_WIDTH 5
#define SPI_DEV_TYPE_ADDR_LEN_LBN 6
#define SPI_DEV_TYPE_ADDR_LEN_WIDTH 2
#define SPI_DEV_TYPE_ERASE_CMD_LBN 8
#define SPI_DEV_TYPE_ERASE_CMD_WIDTH 8
#define SPI_DEV_TYPE_ERASE_SIZE_LBN 16
#define SPI_DEV_TYPE_ERASE_SIZE_WIDTH 5
#define SPI_DEV_TYPE_BLOCK_SIZE_LBN 24
#define SPI_DEV_TYPE_BLOCK_SIZE_WIDTH 5
#define SPI_DEV_TYPE_FIELD(type, field) \
(((type) >> EF4_LOW_BIT(field)) & EF4_MASK32(EF4_WIDTH(field)))
#define FALCON_NVCONFIG_OFFSET 0x300
#define FALCON_NVCONFIG_BOARD_MAGIC_NUM 0xFA1C
struct falcon_nvconfig {
ef4_oword_t ee_vpd_cfg_reg; /* 0x300 */
u8 mac_address[2][8]; /* 0x310 */
ef4_oword_t pcie_sd_ctl0123_reg; /* 0x320 */
ef4_oword_t pcie_sd_ctl45_reg; /* 0x330 */
ef4_oword_t pcie_pcs_ctl_stat_reg; /* 0x340 */
ef4_oword_t hw_init_reg; /* 0x350 */
ef4_oword_t nic_stat_reg; /* 0x360 */
ef4_oword_t glb_ctl_reg; /* 0x370 */
ef4_oword_t srm_cfg_reg; /* 0x380 */
ef4_oword_t spare_reg; /* 0x390 */
__le16 board_magic_num; /* 0x3A0 */
__le16 board_struct_ver;
__le16 board_checksum;
struct falcon_nvconfig_board_v2 board_v2;
ef4_oword_t ee_base_page_reg; /* 0x3B0 */
struct falcon_nvconfig_board_v3 board_v3; /* 0x3C0 */
} __packed;
/*************************************************************************/
static int falcon_reset_hw(struct ef4_nic *efx, enum reset_type method);
static void falcon_reconfigure_mac_wrapper(struct ef4_nic *efx);
static const unsigned int
/* "Large" EEPROM device: Atmel AT25640 or similar
* 8 KB, 16-bit address, 32 B write block */
large_eeprom_type = ((13 << SPI_DEV_TYPE_SIZE_LBN)
| (2 << SPI_DEV_TYPE_ADDR_LEN_LBN)
| (5 << SPI_DEV_TYPE_BLOCK_SIZE_LBN)),
/* Default flash device: Atmel AT25F1024
* 128 KB, 24-bit address, 32 KB erase block, 256 B write block */
default_flash_type = ((17 << SPI_DEV_TYPE_SIZE_LBN)
| (3 << SPI_DEV_TYPE_ADDR_LEN_LBN)
| (0x52 << SPI_DEV_TYPE_ERASE_CMD_LBN)
| (15 << SPI_DEV_TYPE_ERASE_SIZE_LBN)
| (8 << SPI_DEV_TYPE_BLOCK_SIZE_LBN));
/**************************************************************************
*
* I2C bus - this is a bit-bashing interface using GPIO pins
* Note that it uses the output enables to tristate the outputs
* SDA is the data pin and SCL is the clock
*
**************************************************************************
*/
static void falcon_setsda(void *data, int state)
{
struct ef4_nic *efx = (struct ef4_nic *)data;
ef4_oword_t reg;
ef4_reado(efx, ®, FR_AB_GPIO_CTL);
EF4_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN, !state);
ef4_writeo(efx, ®, FR_AB_GPIO_CTL);
}
static void falcon_setscl(void *data, int state)
{
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/delay.h`, `linux/pci.h`, `linux/module.h`, `linux/seq_file.h`, `linux/i2c.h`, `linux/mii.h`, `linux/slab.h`.
- Detected declarations: `struct falcon_nvconfig_board_v2`, `struct falcon_nvconfig_board_v3`, `struct falcon_nvconfig`, `struct falcon_mtd_partition`, `function falcon_setsda`, `function falcon_setscl`, `function falcon_getsda`, `function falcon_getscl`, `function falcon_push_irq_moderation`, `function falcon_prepare_flush`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.