drivers/net/ethernet/sfc/falcon/farch_regs.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/sfc/falcon/farch_regs.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/sfc/falcon/farch_regs.h
Extension
.h
Size
106642 bytes
Lines
2930
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef EF4_FARCH_REGS_H
#define EF4_FARCH_REGS_H

/*
 * Falcon hardware architecture definitions have a name prefix following
 * the format:
 *
 *     F<type>_<min-rev><max-rev>_
 *
 * The following <type> strings are used:
 *
 *             MMIO register  MC register  Host memory structure
 * -------------------------------------------------------------
 * Address     R              MCR
 * Bitfield    RF             MCRF         SF
 * Enumerator  FE             MCFE         SE
 *
 * <min-rev> is the first revision to which the definition applies:
 *
 *     A: Falcon A1 (SFC4000AB)
 *     B: Falcon B0 (SFC4000BA)
 *     C: Siena A0 (SFL9021AA)
 *
 * If the definition has been changed or removed in later revisions
 * then <max-rev> is the last revision to which the definition applies;
 * otherwise it is "Z".
 */

/**************************************************************************
 *
 * Falcon/Siena registers and descriptors
 *
 **************************************************************************
 */

/* ADR_REGION_REG: Address region register */
#define	FR_AZ_ADR_REGION 0x00000000
#define	FRF_AZ_ADR_REGION3_LBN 96
#define	FRF_AZ_ADR_REGION3_WIDTH 18
#define	FRF_AZ_ADR_REGION2_LBN 64
#define	FRF_AZ_ADR_REGION2_WIDTH 18
#define	FRF_AZ_ADR_REGION1_LBN 32
#define	FRF_AZ_ADR_REGION1_WIDTH 18
#define	FRF_AZ_ADR_REGION0_LBN 0
#define	FRF_AZ_ADR_REGION0_WIDTH 18

/* INT_EN_REG_KER: Kernel driver Interrupt enable register */
#define	FR_AZ_INT_EN_KER 0x00000010
#define	FRF_AZ_KER_INT_LEVE_SEL_LBN 8
#define	FRF_AZ_KER_INT_LEVE_SEL_WIDTH 6
#define	FRF_AZ_KER_INT_CHAR_LBN 4
#define	FRF_AZ_KER_INT_CHAR_WIDTH 1
#define	FRF_AZ_KER_INT_KER_LBN 3
#define	FRF_AZ_KER_INT_KER_WIDTH 1
#define	FRF_AZ_DRV_INT_EN_KER_LBN 0
#define	FRF_AZ_DRV_INT_EN_KER_WIDTH 1

/* INT_EN_REG_CHAR: Char Driver interrupt enable register */
#define	FR_BZ_INT_EN_CHAR 0x00000020
#define	FRF_BZ_CHAR_INT_LEVE_SEL_LBN 8
#define	FRF_BZ_CHAR_INT_LEVE_SEL_WIDTH 6
#define	FRF_BZ_CHAR_INT_CHAR_LBN 4
#define	FRF_BZ_CHAR_INT_CHAR_WIDTH 1
#define	FRF_BZ_CHAR_INT_KER_LBN 3
#define	FRF_BZ_CHAR_INT_KER_WIDTH 1
#define	FRF_BZ_DRV_INT_EN_CHAR_LBN 0
#define	FRF_BZ_DRV_INT_EN_CHAR_WIDTH 1

/* INT_ADR_REG_KER: Interrupt host address for Kernel driver */
#define	FR_AZ_INT_ADR_KER 0x00000030
#define	FRF_AZ_NORM_INT_VEC_DIS_KER_LBN 64
#define	FRF_AZ_NORM_INT_VEC_DIS_KER_WIDTH 1
#define	FRF_AZ_INT_ADR_KER_LBN 0
#define	FRF_AZ_INT_ADR_KER_WIDTH 64

/* INT_ADR_REG_CHAR: Interrupt host address for Char driver */
#define	FR_BZ_INT_ADR_CHAR 0x00000040
#define	FRF_BZ_NORM_INT_VEC_DIS_CHAR_LBN 64
#define	FRF_BZ_NORM_INT_VEC_DIS_CHAR_WIDTH 1
#define	FRF_BZ_INT_ADR_CHAR_LBN 0
#define	FRF_BZ_INT_ADR_CHAR_WIDTH 64

/* INT_ACK_KER: Kernel interrupt acknowledge register */
#define	FR_AA_INT_ACK_KER 0x00000050
#define	FRF_AA_INT_ACK_KER_FIELD_LBN 0
#define	FRF_AA_INT_ACK_KER_FIELD_WIDTH 32

/* INT_ISR0_REG: Function 0 Interrupt Acknowledge Status register */
#define	FR_BZ_INT_ISR0 0x00000090
#define	FRF_BZ_INT_ISR_REG_LBN 0

Annotation

Implementation Notes