drivers/net/ethernet/sfc/siena/efx_channels.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/sfc/siena/efx_channels.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/sfc/siena/efx_channels.c- Extension
.c- Size
- 36005 bytes
- Lines
- 1371
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
net_driver.hlinux/module.hlinux/filter.hefx_channels.hefx.hefx_common.htx_common.hrx_common.hnic.hsriov.hworkarounds.h
Detected Declarations
function count_online_coresfunction efx_wanted_parallelismfunction efx_allocate_msix_channelsfunction efx_siena_probe_interruptsfunction efx_siena_set_interrupt_affinityfunction efx_siena_clear_interrupt_affinityfunction efx_siena_set_interrupt_affinityfunction efx_probe_eventqfunction efx_init_eventqfunction efx_siena_start_eventqfunction efx_siena_stop_eventqfunction efx_fini_eventqfunction efx_remove_eventqfunction efx_filter_rfs_expirefunction efx_siena_init_channelsfunction efx_siena_fini_channelsfunction efx_probe_channelfunction efx_for_each_channel_tx_queuefunction efx_for_each_channel_rx_queuefunction efx_get_channel_namefunction efx_siena_set_channel_namesfunction efx_siena_probe_channelsfunction efx_siena_remove_channelfunction efx_siena_remove_channelsfunction efx_set_xdp_tx_queuefunction efx_set_xdp_channelsfunction efx_for_each_channel_tx_queuefunction efx_siena_realloc_channelsfunction efx_siena_set_channelsfunction efx_for_each_channelfunction efx_default_channel_want_txqsfunction efx_soft_enable_interruptsfunction efx_for_each_channelfunction efx_soft_disable_interruptsfunction efx_for_each_channelfunction efx_siena_enable_interruptsfunction efx_for_each_channelfunction efx_siena_disable_interruptsfunction efx_for_each_channelfunction efx_siena_start_channelsfunction efx_for_each_channel_revfunction efx_for_each_channel_rx_queuefunction efx_siena_stop_channelsfunction efx_for_each_channelfunction efx_for_each_channelfunction efx_process_channelfunction efx_for_each_channel_tx_queuefunction efx_update_irq_mod
Annotated Snippet
if (rc >= 0) {
n_channels = rc;
for (i = 0; i < n_channels; i++)
xentries[i].entry = i;
rc = pci_enable_msix_range(efx->pci_dev, xentries, 1,
n_channels);
}
if (rc < 0) {
/* Fall back to single channel MSI */
netif_err(efx, drv, efx->net_dev,
"could not enable MSI-X\n");
if (efx->type->min_interrupt_mode >= EFX_INT_MODE_MSI)
efx->interrupt_mode = EFX_INT_MODE_MSI;
else
return rc;
} else if (rc < n_channels) {
netif_err(efx, drv, efx->net_dev,
"WARNING: Insufficient MSI-X vectors"
" available (%d < %u).\n", rc, n_channels);
netif_err(efx, drv, efx->net_dev,
"WARNING: Performance may be reduced.\n");
n_channels = rc;
}
if (rc > 0) {
for (i = 0; i < efx->n_channels; i++)
efx_get_channel(efx, i)->irq =
xentries[i].vector;
}
}
/* Try single interrupt MSI */
if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
efx->n_channels = 1;
efx->n_rx_channels = 1;
efx->n_tx_channels = 1;
efx->tx_channel_offset = 0;
efx->n_xdp_channels = 0;
efx->xdp_channel_offset = efx->n_channels;
efx->xdp_txq_queues_mode = EFX_XDP_TX_QUEUES_BORROWED;
rc = pci_enable_msi(efx->pci_dev);
if (rc == 0) {
efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
} else {
netif_err(efx, drv, efx->net_dev,
"could not enable MSI\n");
if (efx->type->min_interrupt_mode >= EFX_INT_MODE_LEGACY)
efx->interrupt_mode = EFX_INT_MODE_LEGACY;
else
return rc;
}
}
/* Assume legacy interrupts */
if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
efx->n_channels = 1 + (efx_siena_separate_tx_channels ? 1 : 0);
efx->n_rx_channels = 1;
efx->n_tx_channels = 1;
efx->tx_channel_offset = efx_siena_separate_tx_channels ? 1 : 0;
efx->n_xdp_channels = 0;
efx->xdp_channel_offset = efx->n_channels;
efx->xdp_txq_queues_mode = EFX_XDP_TX_QUEUES_BORROWED;
efx->legacy_irq = efx->pci_dev->irq;
}
/* Assign extra channels if possible, before XDP channels */
efx->n_extra_tx_channels = 0;
j = efx->xdp_channel_offset;
for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
if (!efx->extra_channel_type[i])
continue;
if (j <= efx->tx_channel_offset + efx->n_tx_channels) {
efx->extra_channel_type[i]->handle_no_channel(efx);
} else {
--j;
efx_get_channel(efx, j)->type =
efx->extra_channel_type[i];
if (efx_channel_has_tx_queues(efx_get_channel(efx, j)))
efx->n_extra_tx_channels++;
}
}
rss_spread = efx->n_rx_channels;
/* RSS might be usable on VFs even if it is disabled on the PF */
#ifdef CONFIG_SFC_SIENA_SRIOV
if (efx->type->sriov_wanted) {
efx->rss_spread = ((rss_spread > 1 ||
!efx->type->sriov_wanted(efx)) ?
rss_spread : efx_vf_size(efx));
return 0;
Annotation
- Immediate include surface: `net_driver.h`, `linux/module.h`, `linux/filter.h`, `efx_channels.h`, `efx.h`, `efx_common.h`, `tx_common.h`, `rx_common.h`.
- Detected declarations: `function count_online_cores`, `function efx_wanted_parallelism`, `function efx_allocate_msix_channels`, `function efx_siena_probe_interrupts`, `function efx_siena_set_interrupt_affinity`, `function efx_siena_clear_interrupt_affinity`, `function efx_siena_set_interrupt_affinity`, `function efx_probe_eventq`, `function efx_init_eventq`, `function efx_siena_start_eventq`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.