drivers/net/ethernet/sfc/siena/tx.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/sfc/siena/tx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/sfc/siena/tx.c- Extension
.c- Size
- 11174 bytes
- Lines
- 393
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/pci.hlinux/tcp.hlinux/ip.hlinux/in.hlinux/ipv6.hlinux/slab.hnet/ipv6.hlinux/if_ether.hlinux/highmem.hlinux/cache.hnet_driver.hefx.hio.hnic.htx.htx_common.hworkarounds.h
Detected Declarations
function efx_tx_maybe_stop_queuefunction efx_enqueue_skb_copyfunction efx_tx_send_pendingfunction efx_for_each_channel_tx_queuefunction netif_tx_lockfunction efx_siena_xdp_tx_buffersfunction efx_siena_hard_start_xmitfunction unlikelyfunction efx_siena_init_tx_queue_core_txqfunction efx_siena_setup_tc
Annotated Snippet
unlikely(efx_siena_ptp_is_ptp_tx(efx, skb)))) {
/* There may be existing transmits on the channel that are
* waiting for this packet to trigger the doorbell write.
* We need to send the packets at this point.
*/
efx_tx_send_pending(efx_get_tx_channel(efx, index));
return efx_siena_ptp_tx(efx, skb);
}
tx_queue = efx_get_tx_queue(efx, index, type);
if (WARN_ON_ONCE(!tx_queue)) {
/* We don't have a TXQ of the right type.
* This should never happen, as we don't advertise offload
* features unless we can support them.
*/
dev_kfree_skb_any(skb);
/* If we're not expecting another transmit and we had something to push
* on this queue or a partner queue then we need to push here to get the
* previous packets out.
*/
if (!netdev_xmit_more())
efx_tx_send_pending(efx_get_tx_channel(efx, index));
return NETDEV_TX_OK;
}
return __efx_siena_enqueue_skb(tx_queue, skb);
}
void efx_siena_init_tx_queue_core_txq(struct efx_tx_queue *tx_queue)
{
struct efx_nic *efx = tx_queue->efx;
/* Must be inverse of queue lookup in efx_siena_hard_start_xmit() */
tx_queue->core_txq =
netdev_get_tx_queue(efx->net_dev,
tx_queue->channel->channel +
((tx_queue->type & EFX_TXQ_TYPE_HIGHPRI) ?
efx->n_tx_channels : 0));
}
int efx_siena_setup_tc(struct net_device *net_dev, enum tc_setup_type type,
void *type_data)
{
struct efx_nic *efx = netdev_priv(net_dev);
struct tc_mqprio_qopt *mqprio = type_data;
unsigned tc, num_tc;
if (type != TC_SETUP_QDISC_MQPRIO)
return -EOPNOTSUPP;
/* Only Siena supported highpri queues */
if (efx_nic_rev(efx) > EFX_REV_SIENA_A0)
return -EOPNOTSUPP;
num_tc = mqprio->num_tc;
if (num_tc > EFX_MAX_TX_TC)
return -EINVAL;
mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
if (num_tc == net_dev->num_tc)
return 0;
for (tc = 0; tc < num_tc; tc++) {
net_dev->tc_to_txq[tc].offset = tc * efx->n_tx_channels;
net_dev->tc_to_txq[tc].count = efx->n_tx_channels;
}
net_dev->num_tc = num_tc;
return netif_set_real_num_tx_queues(net_dev,
max_t(int, num_tc, 1) *
efx->n_tx_channels);
}
Annotation
- Immediate include surface: `linux/pci.h`, `linux/tcp.h`, `linux/ip.h`, `linux/in.h`, `linux/ipv6.h`, `linux/slab.h`, `net/ipv6.h`, `linux/if_ether.h`.
- Detected declarations: `function efx_tx_maybe_stop_queue`, `function efx_enqueue_skb_copy`, `function efx_tx_send_pending`, `function efx_for_each_channel_tx_queue`, `function netif_tx_lock`, `function efx_siena_xdp_tx_buffers`, `function efx_siena_hard_start_xmit`, `function unlikely`, `function efx_siena_init_tx_queue_core_txq`, `function efx_siena_setup_tc`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.