drivers/net/ethernet/smsc/smsc9420.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/smsc/smsc9420.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/smsc/smsc9420.c- Extension
.c- Size
- 42417 bytes
- Lines
- 1671
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/interrupt.hlinux/kernel.hlinux/netdevice.hlinux/phy.hlinux/pci.hlinux/if_vlan.hlinux/dma-mapping.hlinux/crc32.hlinux/slab.hlinux/module.hlinux/unaligned.hsmsc9420.h
Detected Declarations
struct smsc9420_dma_descstruct smsc9420_ring_infostruct smsc9420_pdatafunction smsc9420_reg_readfunction smsc9420_reg_writefunction smsc9420_pci_flush_writefunction smsc9420_mii_readfunction smsc9420_mii_writefunction smsc9420_hashfunction smsc9420_eeprom_reloadfunction smsc9420_ethtool_get_drvinfofunction smsc9420_ethtool_get_msglevelfunction smsc9420_ethtool_set_msglevelfunction smsc9420_ethtool_getregslenfunction smsc9420_ethtool_getregsfunction smsc9420_eeprom_enable_accessfunction smsc9420_eeprom_send_cmdfunction smsc9420_eeprom_read_locationfunction smsc9420_eeprom_write_locationfunction smsc9420_ethtool_get_eeprom_lenfunction smsc9420_ethtool_get_eepromfunction smsc9420_ethtool_set_eepromfunction smsc9420_set_mac_addressfunction smsc9420_check_mac_addressfunction smsc9420_stop_txfunction smsc9420_free_tx_ringfunction smsc9420_free_rx_ringfunction smsc9420_stop_rxfunction smsc9420_isrfunction smsc9420_poll_controllerfunction smsc9420_dmac_soft_resetfunction smsc9420_stopfunction smsc9420_rx_count_statsfunction smsc9420_rx_handofffunction smsc9420_alloc_rx_bufferfunction smsc9420_alloc_new_rx_buffersfunction smsc9420_rx_pollfunction smsc9420_tx_update_statsfunction smsc9420_complete_txfunction smsc9420_hard_start_xmitfunction smsc9420_set_multicast_listfunction netdev_for_each_mc_addrfunction smsc9420_phy_update_flowcontrolfunction smsc9420_phy_adjust_linkfunction smsc9420_mii_probefunction smsc9420_mii_initfunction smsc9420_alloc_tx_ringfunction smsc9420_alloc_rx_ring
Annotated Snippet
static const struct net_device_ops smsc9420_netdev_ops = {
.ndo_open = smsc9420_open,
.ndo_stop = smsc9420_stop,
.ndo_start_xmit = smsc9420_hard_start_xmit,
.ndo_get_stats = smsc9420_get_stats,
.ndo_set_rx_mode = smsc9420_set_multicast_list,
.ndo_eth_ioctl = phy_do_ioctl_running,
.ndo_validate_addr = eth_validate_addr,
.ndo_set_mac_address = eth_mac_addr,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = smsc9420_poll_controller,
#endif /* CONFIG_NET_POLL_CONTROLLER */
};
static int
smsc9420_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
struct net_device *dev;
struct smsc9420_pdata *pd;
void __iomem *virt_addr;
int result = 0;
u32 id_rev;
pr_info("%s version %s\n", DRV_DESCRIPTION, DRV_VERSION);
/* First do the PCI initialisation */
result = pci_enable_device(pdev);
if (unlikely(result)) {
pr_err("Cannot enable smsc9420\n");
goto out_0;
}
pci_set_master(pdev);
dev = alloc_etherdev(sizeof(*pd));
if (!dev)
goto out_disable_pci_device_1;
SET_NETDEV_DEV(dev, &pdev->dev);
if (!(pci_resource_flags(pdev, SMSC_BAR) & IORESOURCE_MEM)) {
netdev_err(dev, "Cannot find PCI device base address\n");
goto out_free_netdev_2;
}
if ((pci_request_regions(pdev, DRV_NAME))) {
netdev_err(dev, "Cannot obtain PCI resources, aborting\n");
goto out_free_netdev_2;
}
if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
netdev_err(dev, "No usable DMA configuration, aborting\n");
goto out_free_regions_3;
}
virt_addr = ioremap(pci_resource_start(pdev, SMSC_BAR),
pci_resource_len(pdev, SMSC_BAR));
if (!virt_addr) {
netdev_err(dev, "Cannot map device registers, aborting\n");
goto out_free_regions_3;
}
/* registers are double mapped with 0 offset for LE and 0x200 for BE */
virt_addr += LAN9420_CPSR_ENDIAN_OFFSET;
pd = netdev_priv(dev);
/* pci descriptors are created in the PCI consistent area */
pd->rx_ring = dma_alloc_coherent(&pdev->dev,
sizeof(struct smsc9420_dma_desc) * (RX_RING_SIZE + TX_RING_SIZE),
&pd->rx_dma_addr, GFP_KERNEL);
if (!pd->rx_ring)
goto out_free_io_4;
/* descriptors are aligned due to the nature of dma_alloc_coherent */
pd->tx_ring = (pd->rx_ring + RX_RING_SIZE);
pd->tx_dma_addr = pd->rx_dma_addr +
sizeof(struct smsc9420_dma_desc) * RX_RING_SIZE;
pd->pdev = pdev;
pd->dev = dev;
pd->ioaddr = virt_addr;
pd->msg_enable = smsc_debug;
pd->rx_csum = true;
netif_dbg(pd, probe, pd->dev, "lan_base=0x%08lx\n", (ulong)virt_addr);
id_rev = smsc9420_reg_read(pd, ID_REV);
switch (id_rev & 0xFFFF0000) {
Annotation
- Immediate include surface: `linux/interrupt.h`, `linux/kernel.h`, `linux/netdevice.h`, `linux/phy.h`, `linux/pci.h`, `linux/if_vlan.h`, `linux/dma-mapping.h`, `linux/crc32.h`.
- Detected declarations: `struct smsc9420_dma_desc`, `struct smsc9420_ring_info`, `struct smsc9420_pdata`, `function smsc9420_reg_read`, `function smsc9420_reg_write`, `function smsc9420_pci_flush_write`, `function smsc9420_mii_read`, `function smsc9420_mii_write`, `function smsc9420_hash`, `function smsc9420_eeprom_reload`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.