drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c
Extension
.c
Size
8184 bytes
Lines
285
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ingenic_mac {
	const struct ingenic_soc_info *soc_info;
	struct plat_stmmacenet_data *plat_dat;
	struct device *dev;
	struct regmap *regmap;

	int rx_delay;
	int tx_delay;
};

struct ingenic_soc_info {
	enum ingenic_mac_version version;
	u32 mask;

	int (*set_mode)(struct ingenic_mac *mac, u8 phy_intf_sel);

	u8 valid_phy_intf_sel;
};

static int jz4775_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel)
{
	unsigned int val;

	val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel) |
	      FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT);

	/* Update MAC PHY control register */
	return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val);
}

static int x1000_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel)
{
	/* Update MAC PHY control register */
	return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, 0);
}

static int x1600_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel)
{
	unsigned int val;

	val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel);

	/* Update MAC PHY control register */
	return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val);
}

static int x1830_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel)
{
	unsigned int val;

	val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) |
	      FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel);

	/* Update MAC PHY control register */
	return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val);
}

static int x2000_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel)
{
	unsigned int val;

	val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel);

	if (phy_intf_sel == PHY_INTF_SEL_RMII) {
		val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) |
		       FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN);
	} else if (phy_intf_sel == PHY_INTF_SEL_RGMII) {
		if (mac->tx_delay == 0)
			val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN);
		else
			val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_DELAY) |
			       FIELD_PREP(MACPHYC_TX_DELAY_MASK, (mac->tx_delay + 9750) / 19500 - 1);

		if (mac->rx_delay == 0)
			val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN);
		else
			val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_DELAY) |
				   FIELD_PREP(MACPHYC_RX_DELAY_MASK, (mac->rx_delay + 9750) / 19500 - 1);
	}

	/* Update MAC PHY control register */
	return regmap_update_bits(mac->regmap, 0, mac->soc_info->mask, val);
}

static int ingenic_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)
{
	struct ingenic_mac *mac = bsp_priv;

	if (!mac->soc_info->set_mode)
		return 0;

Annotation

Implementation Notes