drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c- Extension
.c- Size
- 14508 bytes
- Lines
- 521
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/clk-provider.hlinux/device.hlinux/ethtool.hlinux/io.hlinux/ioport.hlinux/module.hlinux/of.hlinux/of_net.hlinux/mfd/syscon.hlinux/platform_device.hlinux/stmmac.hstmmac_platform.h
Detected Declarations
struct meson8b_dwmacstruct meson8b_dwmac_datastruct meson8b_dwmacstruct meson8b_dwmac_clk_configsfunction meson8b_dwmac_mask_bitsfunction meson8b_init_rgmii_tx_clkfunction meson8b_set_phy_modefunction meson_axg_set_phy_modefunction meson8b_clk_disable_unpreparefunction meson8b_devm_clk_prepare_enablefunction meson8b_init_rgmii_delaysfunction meson8b_init_prg_ethfunction meson8b_dwmac_probe
Annotated Snippet
struct meson8b_dwmac_data {
int (*set_phy_mode)(struct meson8b_dwmac *dwmac);
bool has_prg_eth1_rgmii_rx_delay;
};
struct meson8b_dwmac {
struct device *dev;
void __iomem *regs;
const struct meson8b_dwmac_data *data;
phy_interface_t phy_mode;
struct clk *rgmii_tx_clk;
u32 tx_delay_ns;
u32 rx_delay_ps;
struct clk *timing_adj_clk;
};
struct meson8b_dwmac_clk_configs {
struct clk_mux m250_mux;
struct clk_divider m250_div;
struct clk_fixed_factor fixed_div2;
struct clk_gate rgmii_tx_en;
};
static void meson8b_dwmac_mask_bits(struct meson8b_dwmac *dwmac, u32 reg,
u32 mask, u32 value)
{
u32 data;
data = readl(dwmac->regs + reg);
data &= ~mask;
data |= (value & mask);
writel(data, dwmac->regs + reg);
}
static struct clk *meson8b_dwmac_register_clk(struct meson8b_dwmac *dwmac,
const char *name_suffix,
const struct clk_parent_data *parents,
int num_parents,
const struct clk_ops *ops,
struct clk_hw *hw)
{
struct clk_init_data init = { };
char clk_name[32];
snprintf(clk_name, sizeof(clk_name), "%s#%s", dev_name(dwmac->dev),
name_suffix);
init.name = clk_name;
init.ops = ops;
init.flags = CLK_SET_RATE_PARENT;
init.parent_data = parents;
init.num_parents = num_parents;
hw->init = &init;
return devm_clk_register(dwmac->dev, hw);
}
static int meson8b_init_rgmii_tx_clk(struct meson8b_dwmac *dwmac)
{
struct clk *clk;
struct device *dev = dwmac->dev;
static const struct clk_parent_data mux_parents[] = {
{ .fw_name = "clkin0", },
{ .index = -1, },
};
static const struct clk_div_table div_table[] = {
{ .div = 2, .val = 2, },
{ .div = 3, .val = 3, },
{ .div = 4, .val = 4, },
{ .div = 5, .val = 5, },
{ .div = 6, .val = 6, },
{ .div = 7, .val = 7, },
{ /* end of array */ }
};
struct meson8b_dwmac_clk_configs *clk_configs;
struct clk_parent_data parent_data = { };
clk_configs = devm_kzalloc(dev, sizeof(*clk_configs), GFP_KERNEL);
if (!clk_configs)
return -ENOMEM;
clk_configs->m250_mux.reg = dwmac->regs + PRG_ETH0;
clk_configs->m250_mux.shift = __ffs(PRG_ETH0_CLK_M250_SEL_MASK);
clk_configs->m250_mux.mask = PRG_ETH0_CLK_M250_SEL_MASK >>
clk_configs->m250_mux.shift;
clk = meson8b_dwmac_register_clk(dwmac, "m250_sel", mux_parents,
ARRAY_SIZE(mux_parents), &clk_mux_ops,
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/clk-provider.h`, `linux/device.h`, `linux/ethtool.h`, `linux/io.h`, `linux/ioport.h`, `linux/module.h`.
- Detected declarations: `struct meson8b_dwmac`, `struct meson8b_dwmac_data`, `struct meson8b_dwmac`, `struct meson8b_dwmac_clk_configs`, `function meson8b_dwmac_mask_bits`, `function meson8b_init_rgmii_tx_clk`, `function meson8b_set_phy_mode`, `function meson_axg_set_phy_mode`, `function meson8b_clk_disable_unprepare`, `function meson8b_devm_clk_prepare_enable`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.