drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c- Extension
.c- Size
- 34500 bytes
- Lines
- 1300
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/io.hlinux/iopoll.hlinux/mdio-mux.hlinux/mfd/syscon.hlinux/module.hlinux/of.hlinux/of_mdio.hlinux/of_net.hlinux/of_platform.hlinux/phy.hlinux/platform_device.hlinux/pm_runtime.hlinux/regulator/consumer.hlinux/regmap.hlinux/stmmac.hstmmac.hstmmac_platform.h
Detected Declarations
struct emac_variantstruct sunxi_priv_datafunction sun8i_dwmac_dma_resetfunction sun8i_dwmac_dma_initfunction sun8i_dwmac_dma_init_rxfunction sun8i_dwmac_dma_init_txfunction sun8i_dwmac_dump_regsfunction sun8i_dwmac_dump_mac_regsfunction sun8i_dwmac_enable_dma_irqfunction sun8i_dwmac_disable_dma_irqfunction sun8i_dwmac_dma_start_txfunction sun8i_dwmac_enable_dma_transmissionfunction sun8i_dwmac_dma_stop_txfunction sun8i_dwmac_dma_start_rxfunction sun8i_dwmac_dma_stop_rxfunction sun8i_dwmac_dma_interruptfunction sun8i_dwmac_dma_operation_mode_rxfunction sun8i_dwmac_dma_operation_mode_txfunction sun8i_dwmac_initfunction sun8i_dwmac_core_initfunction sun8i_dwmac_set_macfunction sun8i_dwmac_set_umac_addrfunction sun8i_dwmac_get_umac_addrfunction sun8i_dwmac_rx_ipc_enablefunction sun8i_dwmac_set_filterfunction sun8i_dwmac_flow_ctrlfunction sun8i_dwmac_resetfunction get_ephy_nodesfunction sun8i_dwmac_power_internal_phyfunction sun8i_dwmac_unpower_internal_phyfunction mdio_mux_syscon_switch_fnfunction sun8i_dwmac_register_mdio_muxfunction sun8i_dwmac_set_sysconfunction sun8i_dwmac_unset_sysconfunction sun8i_dwmac_exitfunction sun8i_dwmac_set_mac_loopbackfunction sun8i_dwmac_setupfunction sun8i_dwmac_probefunction stmmac_dvr_probefunction sun8i_dwmac_removefunction sun8i_dwmac_shutdown
Annotated Snippet
struct emac_variant {
const struct reg_field *syscon_field;
bool soc_has_internal_phy;
bool support_mii;
bool support_rmii;
bool support_rgmii;
u8 rx_delay_max;
u8 tx_delay_max;
};
/* struct sunxi_priv_data - hold all sunxi private data
* @ephy_clk: reference to the optional EPHY clock for the internal PHY
* @regulator: reference to the optional regulator
* @rst_ephy: reference to the optional EPHY reset for the internal PHY
* @variant: reference to the current board variant
* @regmap: regmap for using the syscon
* @internal_phy_powered: Does the internal PHY is enabled
* @use_internal_phy: Is the internal PHY selected for use
* @mux_handle: Internal pointer used by mdio-mux lib
*/
struct sunxi_priv_data {
struct clk *ephy_clk;
struct regulator *regulator;
struct reset_control *rst_ephy;
const struct emac_variant *variant;
struct regmap_field *regmap_field;
bool internal_phy_powered;
bool use_internal_phy;
void *mux_handle;
};
/* EMAC clock register @ 0x30 in the "system control" address range */
static const struct reg_field sun8i_syscon_reg_field = {
.reg = 0x30,
.lsb = 0,
.msb = 31,
};
/* EMAC clock register @ 0x164 in the CCU address range */
static const struct reg_field sun8i_ccu_reg_field = {
.reg = 0x164,
.lsb = 0,
.msb = 31,
};
static const struct emac_variant emac_variant_h3 = {
.syscon_field = &sun8i_syscon_reg_field,
.soc_has_internal_phy = true,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true,
.rx_delay_max = 31,
.tx_delay_max = 7,
};
static const struct emac_variant emac_variant_v3s = {
.syscon_field = &sun8i_syscon_reg_field,
.soc_has_internal_phy = true,
.support_mii = true
};
static const struct emac_variant emac_variant_a83t = {
.syscon_field = &sun8i_syscon_reg_field,
.soc_has_internal_phy = false,
.support_mii = true,
.support_rgmii = true,
.rx_delay_max = 31,
.tx_delay_max = 7,
};
static const struct emac_variant emac_variant_r40 = {
.syscon_field = &sun8i_ccu_reg_field,
.support_mii = true,
.support_rgmii = true,
.rx_delay_max = 7,
};
static const struct emac_variant emac_variant_a64 = {
.syscon_field = &sun8i_syscon_reg_field,
.soc_has_internal_phy = false,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true,
.rx_delay_max = 31,
.tx_delay_max = 7,
};
static const struct emac_variant emac_variant_h6 = {
.syscon_field = &sun8i_syscon_reg_field,
/* The "Internal PHY" of H6 is not on the die. It's on the
Annotation
- Immediate include surface: `linux/clk.h`, `linux/io.h`, `linux/iopoll.h`, `linux/mdio-mux.h`, `linux/mfd/syscon.h`, `linux/module.h`, `linux/of.h`, `linux/of_mdio.h`.
- Detected declarations: `struct emac_variant`, `struct sunxi_priv_data`, `function sun8i_dwmac_dma_reset`, `function sun8i_dwmac_dma_init`, `function sun8i_dwmac_dma_init_rx`, `function sun8i_dwmac_dma_init_tx`, `function sun8i_dwmac_dump_regs`, `function sun8i_dwmac_dump_mac_regs`, `function sun8i_dwmac_enable_dma_irq`, `function sun8i_dwmac_disable_dma_irq`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.